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A computational memory unit using phase-change memory devices

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Short Description

For decades, conventional computers based on the von Neumann architecture have performed computation by repeatedly transferring data between their processing and their memory units, which are physically separated. As computation becomes increasingly data-centric and as the scalability limits in terms of performance and power are being reached, alternative computing paradigms are searched for in which computation and storage are collocated. A fascinating new approach is that of computational memory where the physics of nanoscale memory devices are used to perform certain computational tasks within the memory unit in a non-von Neumann manner.

Computational memory is finding applications in a variety of application areas such as machine learning and signal processing. In IBM Research - Zurich we have shown experimental demonstrations of this concept using up to a million phase-change memory devices. Unsupervised learning of temporal correlations and solution of linear equations are two such applications that we have recently demonstrated.

We are inviting applications from students enrolled in the ETH Master’s program to conduct their thesis work at IBM Research – Zurich on this exciting new topic. The research focus will be on the circuit level implications of such a computational memory unit. It also involves interactions with several researchers focusing on various aspects of the project. The ideal candidate should be well versed in digital and analog circuit design with hands on experimental experience. A strong mathematical background and programming skills will be a significant bonus. Prior knowledge on emerging memory technologies such as phase-change memory is not necessary.

Abstract of the project

Status: Available

Looking for 1-2 Master students
Thesis will be at IBM Zurich in Rüschlikon
Contact (at ETH Zurich): Frank K. Gürkaynak
Contact (at IBM): Abu Sebastian


Mathematical Background
Programming Skills
Basics of Digital and Analog Design (VLSI1/AIC)


60% Theory
40% EDA tools


Luca Benini

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Detailed Task Description


Practical Details