Accelerator for Boosted Binary Features
Image feature extraction is an important analysis tool in many computer vision applications. In the context of this project, it is specifically used for sparse depth estimation in stereo video, and sparse flow estimation in normal video. This project builds upon a previous Semester Thesis (Feature Extraction with Binarized Descriptors: ASIC Implementation and FPGA Environment), where a hardware architecture for image feature extraction has been developed. This IP is currently used in the video analysis part of a more complex video processing system which performs automatic multiview conversion in real-time.
The goal of this project is now to extend the existing hardware architecture with a new type of descriptor which has recently been developed at the IIS. This new descriptor uses a different set of low-level features which have been trained using the AdaBoost learning algorithm, and compared to other standard algorithms it shows much better performance - at relatively low computational cost.
- Scope: Semester or Master Thesis
- Looking for 1-2 Interested Students
- Supervisors: Michael Schaffner, Pascal Hager
- VLSI I
- Introductory course in computer vision (recommended)
- Interest in computer graphics / computer vision
- Matlab, VHDL and C++
- 25% Theory & Literature Study
- 35% Matlab Evaluations
- 40% Hw Architecture & FPGA Implementation