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Design and Implementation of an Approximate Floating Point Unit

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Short Description

Floating point units (FPU) are one part of a micro-processor and usually directly integrated in the pipeline. In a multi-processor environment one private FPU per processor core is not the most energy efficient implementation because floating point (FP)-operations are not always used which means they remain idle for lots of cycles. Sharing FPUs among the processors is expected to improve the utilization of the FPUs and therefore reduce the overall power consumption of the system. Sharing FPUs allows to employ several different units, which can be either precise or approximate.

An approximate FPU benefits of a smaller design, a faster and low-power execution and is a promising approach to further improve the energy efficiency of the system. One way to approximate FP-operations is to use Newton's method to compute FP-operations in an iterative manner. A very fast first order approximation using a look-up table is already sufficient for many applications and greatly simplifies the design.

Your task will be to establish a matlab framework to evaluate different algorithms to approximate FP-operations and finally implement the preferred algorithm in hardware such that it can be integrated in the multi-processor platform.

Status: Completed

Fall Semester 2014 (sem14h1)
Youri Popoff, Florian Scheidegger, Lukas Mueller, Thomas Gautschi, Mario Burger, Florian Schuiki

Prerequisites

VLSI I
Interest in Computer Architectures
Matlab and VHDL/System Verilog knowledge

Character

25% Theory
50% ASIC Design
25% EDA tools

Professor

Luca Benini

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