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Hardware Accelerated Derivative Pricing

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Short Description

Abstract of the project It is generally impossible to evaluate prices and risk figures for complex financial derivatives analytically. For this reason banks and other financial institutions invest heavily in grid computing for Monte-Carlo pricing, often for portfolios of hundreds of thousands of options. This project will investigate whether FPGA-based hardware-acceleration can offer cost & speed advantages over CPU clusters.

The student will be instructed on stock market models and how to use them in a Monte-Carlo framework for option pricing. A Matlab framework will then be developed which will form the basis of the digital design for hardware implementation on Field Programmable Gate Array (FPGA) using hardware description language (HDL). This project is suited to students who have broad interests, not just in hardware, but also in its business applications. Students with VHDL experience will be favored.

This project is a collaboration between the Integrated Systems laboratory (IIS) at D- ITET and the Chair of Entrepreneurial Risks (ER) at D-MTEC. The student will receive supervision on the algorithms behind Monte-Carlo based derivative pricing from the Chair of ER and supervision on the FPGA-based hardware implementation from IIS. As such this represents a unique chance to work on an emerging interdisciplinary application of particular industrial relevance to the financial sector in Zurich.

Status: Completed

Fall Semester 2014
Miguel Guerrero


Interest in signal Processing
Interest in Hardware Development


15% Theory
60% Implementation on FPGA


Qiuting Huang