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High-Throughput Channel Coding & Decoding for V2X Communications

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Chip micrograph of a previously completed LTE-Advanced turbo decoder by Belfanti and Roth.

Short Description

The exploding demand for data-centric applications on mobile devices has led to ever-increasing data rates in mobile communication standards. The most recent 3GPP standard evolution, LTE-Advanced (LTE-A), specifies peak data rates of up to 3Gbps by adding 8x8 MIMO and increasing the radio bandwidth to 100MHz, which is almost 10x the maximum throughput of the LTE standard currently deployed around the world. In fact, LTE-A is the first true 4G standard meeting all requirements imposed by ITU, which includes providing at least 1Gbps peak throughput. These high throughput requirements combined with the flexibility mandatory to cope with a wide range of code rates and block sizes render the turbo decoder one of the key challenges in the design of user equipment for mobile communications.

In this project, architectures for high-throughput channel coding and decoding are focusing on the latency of the individual iterations as this becomes a throughput limiting factor for high degrees of parallelism. Maintaining high throughput even for highest code rates without any concessions in BER performance is mandatory in mobility scenarios, thus a state of-the-art implementation must be highly optimized.

Status: Available

Looking for 1-2 Semester/Master students
Contact: Karim Badawi, Taimir Aguacil

Prerequisites

VLSI I
Interest in digital design
Background in signal processing or digital communications
VLSI II (optional)

Character

20% Theory & Simulation
60% ASIC/FPGA Design
20% EDA tools

Professor

Qiuting Huang

Practical Details

Links

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