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Difference between revisions of "Baseband Processor Development for 4G IoT"

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The goal of this project is to design a processor using existing components and port it to an FPGA-based prototyping platform for 4G/LTE mobile communication. It shall consist of a commercial FPGA board (KC705, see [2]) and the [[evaLTE]] FMC module which holds RF solutions from [3]. The FPGA on the KC705 shall be used for RF controlling and baseband processing. In addition, the results from [[Baseband Meets CPU]] can be used to incorporate higher layer processing using a [[PULP]] CPU on the FPGA, as well. Once the testbed is running, the baseband processing can be enhanced and software running on the PULP can be written and immediately tested.
 
The goal of this project is to design a processor using existing components and port it to an FPGA-based prototyping platform for 4G/LTE mobile communication. It shall consist of a commercial FPGA board (KC705, see [2]) and the [[evaLTE]] FMC module which holds RF solutions from [3]. The FPGA on the KC705 shall be used for RF controlling and baseband processing. In addition, the results from [[Baseband Meets CPU]] can be used to incorporate higher layer processing using a [[PULP]] CPU on the FPGA, as well. Once the testbed is running, the baseband processing can be enhanced and software running on the PULP can be written and immediately tested.
  
===Status: Available ===
+
===Status: Obsolete ===
: Looking for interested students (Semester or Master Thesis)
+
: Contact: [[User:Weberbe|Benjamin Weber]]
: Supervision: [[User:Weberbe|Benjamin Weber]], [[User:Vogelpi|Pirmin Vogel]]
 
 
 
===Character===
 
: 10% Theory
 
: 60% System/FPGA Design
 
: 30% Software
 
 
 
===Prerequisites===
 
: VLSI I
 
: Matlab, VHDL, C
 
 
 
===Professor===
 
[http://www.iis.ee.ethz.ch/portrait/staff/huang.en.html Qiuting Huang]
 
or
 
[http://www.iis.ee.ethz.ch/portrait/staff/lbenini.en.html Luca Benini]
 
  
 
==References==  
 
==References==  
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[3] Advanced Circuit Pursuit, ACP AG. http://www.newacp.ch/, May 2015.
 
[3] Advanced Circuit Pursuit, ACP AG. http://www.newacp.ch/, May 2015.
  
[[Category:Digital]]
 
[[Category:Semester Thesis]]
 
[[Category:Master Thesis]]
 
[[Category:Available]]
 
[[Category:Hot]]
 
[[Category:FPGA]]
 
[[Category:PULP]]
 
[[Category:Telecommunications]]
 
 
[[Category:Weberbe]]
 
[[Category:Weberbe]]
[[Category:Vogelpi]]
 

Latest revision as of 16:58, 14 April 2016

4G modem SoC with RF, DBB, and L2/L3.
2G Testbed setup with L2/L3 processing on ZedBoard (top), double RF on evalEDGE v1.0 (middle), and baseband on ML605 (bottom).

Short Description

Various estimates predict 20 to 30 billion embedded devices connected to the Internet in 2020 in what is called the Internet of things (IoT). To realize this vision, cellular standards evolve to meet the requirements regarding low power and low-cost of IoT components, especially on the client side. In the latest release of the LTE standard, a new user-equipment category (Cat-0) for Machine-to-Machine (M2M) communications and the Internet of things (IoT) was introduced [1]. In order to develop signal-processing algorithms for the fast evolving LTE landscape a fast prototyping platform is indispensable.

A 4G cellular modem consists of an RF front-end, hardwired Digital Baseband (DBB) processing, and L2/L3 processing on a CPU. It is advantageous to use an FPGA as base. Improvements to DBB and CPU architecture can be updated immediately to the prototype and software running on the CPU can take advantage of those improvements.

The goal of this project is to design a processor using existing components and port it to an FPGA-based prototyping platform for 4G/LTE mobile communication. It shall consist of a commercial FPGA board (KC705, see [2]) and the evaLTE FMC module which holds RF solutions from [3]. The FPGA on the KC705 shall be used for RF controlling and baseband processing. In addition, the results from Baseband Meets CPU can be used to incorporate higher layer processing using a PULP CPU on the FPGA, as well. Once the testbed is running, the baseband processing can be enhanced and software running on the PULP can be written and immediately tested.

Status: Obsolete

Contact: Benjamin Weber

References

[1] Redefining LTE for IoT. http://www.nextgcom.co.uk/wordpress/wp-content/uploads/2014/09/ARM-NextG-LTE-Cat0-White-Paper-Final.pdf, May 2015.

[2] XILINX, Kintex-7 FPGA KC705 Evaluation Kit. http://www.xilinx.com/products/boards-and-kits/ek-k7-kc705-g.html, Dec 2015.

[3] Advanced Circuit Pursuit, ACP AG. http://www.newacp.ch/, May 2015.