Difference between revisions of "Category:Computer Architecture"
(Redirected page to Computer Architecture)
(Blanked the page)
|Line 1:||Line 1:|
Latest revision as of 16:46, 10 November 2020
Pages in category "Computer Architecture"
The following 34 pages are in this category, out of 34 total.
- A Flexible Peripheral System for High-Performance Systems on Chip (M)
- A Snitch-based Compute Accelerator for HERO (M/1-2S)
- A Snitch-Based SoC on iCE40 FPGAs (1-2S/B)
- An RPC DRAM Implementation for Energy-Efficient ASICs (1-2S)
- Ara: Update PULP's Vector Processor with the recent RISC-V Vector Extension Development
- Ibex: Bit-Manipulation Extension
- Ibex: FPGA Optimizations
- Implementation of a Heterogeneous System for Image Processing on an FPGA (S)
- Implementation of the RISC-V Bit Manipulation (RVB) extensions for our RISC-V core
- Investigation of the high-performance multi-threaded OoO IBM A2O Core (1-3S)
- IP-Based SoC Generation and Configuration (1-3S/B)
- ISA extensions in the Snitch Processor for Signal Processing (M)