Category:PULP
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Pages in category "PULP"
The following 69 pages are in this category, out of 69 total.
A
- A Novel Execution Scheme for Ultra-tiny CNNs Aboard Nano-UAVs
- A Waypoint-based Navigation System for Nano-Size UAVs in GPS-denied Environments
- An all Standard-Cell Based Energy Efficient HW Accelerator for DSP and Deep Learning Applications
- Ara: Update PULP's Vector Processor with the recent RISC-V Vector Extension Development
B
C
D
E
- Efficient TNN Inference on PULP Systems
- Embedded Audio Source Localization Exploiting Coincidence Detection in Asynchronous Spike Streams
- Energy Efficient Autonomous UAVs
- Evaluating the RiscV Architecture
- Event-based navigation on autonomous nano-drones
- Extend the RI5CY core with priviledge extensions
H
I
- Ibex: Bit-Manipulation Extension
- Ibex: FPGA Optimizations
- Ibex: Tightly-Coupled Accelerators and ISA Extensions
- Implementation of a Heterogeneous System for Image Processing on an FPGA (S)
- Implementation of the RISC-V Bit Manipulation (RVB) extensions for our RI5CY core
- Implementation of the RISC-V Bit Manipulation (RVB) extensions for our RISC-V core
- Improved Collision Avoidance for Nano-drones
- Improved State Estimation on PULP-based Nano-UAVs
L
M
P
- Physical Implementation of MemPool, PULP's Manycore System (1M/1-2S)
- Physics is looking for PULP
- PULP
- PULP in space - Fault Tolerant PULP System for Critical Space Applications
- PULP-Shield for Autonomous UAV
- PULPonFPGA: Hardware L2 Cache
- PULPonFPGA: Lightweight Virtual Memory Support - Coherency Extensions
- PULPonFPGA: Lightweight Virtual Memory Support - Multi-Level TLB
- PULPonFPGA: Lightweight Virtual Memory Support - Page Table Walker
- PULPonFPGA: Lightweight Virtual Memory Support - Physically Contiguous Memory
- PULPonFPGA: Lightweight Virtual Memory Support - Software Cache
- PVT Dynamic Adaptation in PULPv3
