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Samuel Riedel

Sriedel face pulp team.jpg

I finished my B.Sc. and M.Sc. in electrical engineering at ETH Zürich in 2017 and 2019, respectively. Since summer 2019, I am pursuing a Ph.D. in the Circuits and Systems group of Prof. Luca Benini.

My main research areas are:

  • Computer and System Architecture
  • Manycore systems
  • Image Processing
  • Parallel Programming



Available Projects

Projects In Progress

Completed Projects