Difference between revisions of "DMA Streaming Co-processor"
|Line 50:||Line 50:|
[[Category:Digital]] [[Category:Master Thesis]] [[Category:Semester Thesis
[[Category:Digital]] [[Category:Master Thesis]] [[Category:Semester Thesis]] [[Category:ASIC]] [[Category:UlpSoC]] [[Category:PULP]] [[Category:Processor]] [[Category:2016]]
Latest revision as of 09:30, 5 November 2019
In many cases a lot of resources are consumed during a preprocessing phase in which the raw data coming, e.g., from an image sensor is transformed in a proper way before being fed to the main processing algorithms. This preprocessing, in many cases, could be done very efficiently while moving the data through the memory hierarchy (e.g. L2 -> L1 transfers).
Like other processors, the PULP platform provides a standard DMA controller for efficient data transfers. In this work, we are going to design a streaming co-processor for the DMA with limited programmability. This co-processor could then perform such tasks on-the-fly when the data is being copied.
Potential application candidates include signal filtering for audio/motion sensor, sub/over sampling, color scheme conversion, image filtering, ciphering and compression/decompression.
- Scope: Semester or Master Thesis
- Looking for 1-2 Interested Students
- Supervisors: Michael Schaffner, Antonio Pullini
- VLSI I
- Basic Computer Architecture Course
- Matlab, VHDL and C++
- 20% Theory & Literature Study
- 30% Evaluations
- 50% Hw Architecture & ASIC Implementation