Difference between revisions of "FPGA Testbed Implementation for Bluetooth Indoor Positioning"
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The goal of this project is to set up an FPGA testbed capable of detecting nearby Bluetooth LE beacons and providing a position estimation based on the measured power. The previously developed digital baseband receiver block integrated in a processor system shall be used as a starting point. As a first step you will identify the information required to estimate the device's location and how it can be extracted from the measurements and results of the Bluetooth LE digital baseband block. Then you will develop the required software to interface the digital baseband block and if needed extend the hardware to provide additional functionalities. Finally you will develop the position calculation and a test set up to verify your implementation. | The goal of this project is to set up an FPGA testbed capable of detecting nearby Bluetooth LE beacons and providing a position estimation based on the measured power. The previously developed digital baseband receiver block integrated in a processor system shall be used as a starting point. As a first step you will identify the information required to estimate the device's location and how it can be extracted from the measurements and results of the Bluetooth LE digital baseband block. Then you will develop the required software to interface the digital baseband block and if needed extend the hardware to provide additional functionalities. Finally you will develop the position calculation and a test set up to verify your implementation. | ||
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+ | ===Status: In Progress === | ||
+ | : Jan Kreisinger | ||
+ | : Supervision: [[:User:Msalomon | Mauro Salomon]] | ||
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===Status: Available === | ===Status: Available === | ||
: Looking for 1-2 Semester/Master students | : Looking for 1-2 Semester/Master students | ||
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: Interest in wireless communications | : Interest in wireless communications | ||
: Knowledge in Matlab, C and/or VHDL is of advantage | : Knowledge in Matlab, C and/or VHDL is of advantage | ||
+ | ---> | ||
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===Status: Completed === | ===Status: Completed === | ||
: Fall Semester 2014 (sem13h2) | : Fall Semester 2014 (sem13h2) | ||
: Matthias Baer, Renzo Andri | : Matthias Baer, Renzo Andri | ||
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[[Category:FPGA]] | [[Category:FPGA]] | ||
[[Category:Telecommunications]] | [[Category:Telecommunications]] | ||
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[[Category:Semester Thesis]] | [[Category:Semester Thesis]] | ||
[[Category:Master Thesis]] | [[Category:Master Thesis]] | ||
[[Category:Msalomon]] | [[Category:Msalomon]] | ||
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Revision as of 21:45, 18 November 2019
Contents
Introduction
The Internet of Things (IoT) is believed to connect tens of billion devices by the year 2020 making it one of the key drivers for the semi-conductor industry. Thereby, a major part of the IoT will consist of moving devices such as unmanned cars or drones. For these kinds of applications the knowledge of the current location is essential.
Solely relying on Global Navigation Satellite Systems (GNSS) such as GPS is insufficient, since these signals cannot be received indoors. Even though there is no well established technology yet, Bluetooth LE beacons are gaining interest as low cost solutions for indoor positioning. As a first step towards a Bluetooth LE modem with positioning support, a digital baseband receiver capable of detecting Bluetooth LE packets and estimating their received signal power was developed at IIS in previous projects.
Project Description
The goal of this project is to set up an FPGA testbed capable of detecting nearby Bluetooth LE beacons and providing a position estimation based on the measured power. The previously developed digital baseband receiver block integrated in a processor system shall be used as a starting point. As a first step you will identify the information required to estimate the device's location and how it can be extracted from the measurements and results of the Bluetooth LE digital baseband block. Then you will develop the required software to interface the digital baseband block and if needed extend the hardware to provide additional functionalities. Finally you will develop the position calculation and a test set up to verify your implementation.
Status: In Progress
- Jan Kreisinger
- Supervision: Mauro Salomon
Character
- 30% Theory, Algorithms and Simulation
- 20% Hardware Design (HLS/VHDL)
- 50% FPGA Verification / ASIC implementation