Fast Wakeup From Deep Sleep State

Short Description

Architecture with reusable IPs highlighted

Ultra-low power operation and extreme energy efficiency are strong requirements for a number of high-growth application areas, such as E-health, Internet of Things, and wearable Human-Computer Interfaces. Most of the applications do not need an always-on system and often implement aggressive duty cycling to minimize the average power consumption. In such applications optimizing the wakeup energy consumption has a significant impact on the overall energy drawn from the battery. The goal of the project is to implement an hardware IP to enable fast save and restore of the status of the PULP multicore platform reusing as much as possible existing components. The project can be summarized as follows:

   1-Extend the current debug unit and enable its access from the system interconnect
   2-implement a state machine that controls the system DMA to save/restore data stored in L1 data memory
   3-design the controller to save and restore both core and L1 memory.
   4-validate the design and include save/restore checks in the regression infrastructure

Status: Available

Semester/Master Thesis

Supervision: Antonio Pullini (IIS)

Professor

Luca Benini

Character

60% Theory, Algorithms and Simulation

40% VHDL

Requirements

Knowledge of matlab and/or C/C++ VHDL

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