HW/SW Safety and Security

We are in the processes of creating a top-level information page, in the meantime please continue directly to the specific subsections below.

Real-Time Embedded Systems

Please continue to Real-Time Embedded Systems if you are interested in designing hardware or writing software for timing predictable embedded systems.

Cryptography

Please continue to Cryptography if you are interested in cryptographic hardware.

Fault Tolerance

Please continue to Fault Tolerance if you are interested in circuits tolerant to radiation-induced soft errors.

Projects

Available Projects

• Designing a Fault-Tolerant On-Chip Interconnect (1-2S/M)
• Enhancing our DMA Engine with Fault Tolerance
• Fast Accelerator Context Switch for PULP
• FPGA mapping of RPC DRAM
• Non-blocking Algorithms in Real-Time Operating Systems
• PULP Freertos with LLVM
• Resource Partitioning of RPC DRAM
• Scan Chain Fault Injection in a PULP SoC (1S)
• Securing Block Ciphers against SCA and SIFA

Projects In Progress

• A RISC-V fault-tolerant many-core accelerator for 5G Non-Terrestrial Networks (1-2S/B)
• Fault-Tolerant Floating-Point Units (M)
• Implementation of a Cache Reliability Mechanism (1S/M)
• On-Board Software for PULP on a Satellite
• Radiation Testing of a PULP ASIC
• Zephyr RTOS on PULP

Completed Projects

• Resource Partitioning of Caches
• Design of an Area-Optimized Soft-Error Resilient Processing Core for Safety-Critical Systems (1M)
• Development of statistics and contention monitoring unit for PULP
• Implementing Configurable Dual-Core Redundancy
• Peripheral Event Linking System for Real-time Capable Energy Efficient SoCs
• CLIC for the CVA6
• SCMI Support for Power Controller Subsystem
• PULP’s CLIC extensions for fast interrupt handling
• Triple-Core PULPissimo
• Watchdog Timer for PULP
• Hypervisor Extension for Ariane (M)
• Securing Block Ciphers against SCA and SIFA