Personal tools

Hardware Accelerator for Model Predictive Controller

From iis-projects

Revision as of 13:47, 5 February 2015 by Kgf (talk | contribs)
(diff) ← Older revision | Latest revision (diff) | Newer revision → (diff)
Jump to: navigation, search
Hardware Accelerator for Model Predictive Controller1.png
Hardware Accelerator for Model Predictive Controller2.png

Abstract of the project

In the latest years model predictive controller has been successfully applied to a different control scenarios. Of particular interest is its application to the thermal management of manycore processors. Differently from standard reactive control Model Preductive Controllers (MPC) outperform classic feedback controllers since they are capable of minimizing performance loss while enforcing safe working temperature. This leads to significant higher FLOPS and smother thermal profile [1].

In recent years reseach works shows that thermal evolution of a multicore system can be effectively modelled with linear state-space representation enabling the use of model predictive control in a real case scenario. In addition to that thermal evolution of multicore platforms are characterized by fast thermal constants (10ms) and this impose a fast control period [2].

We have already implemented a software MPC suitable for the control of a many core system. However, the performance of the software implementation is not sufficient to fulfill the real-time requirements of the system. Therefore we are interested in a Hardware accelerator that will perform the algorithm. This accelerator will then be part of a larger system and be part of the thermal management system. In this project the goal is to implement a novel MPC algorithm in hardware for a new generation of smarter on-line thermal management. Internally at each iteration the HW MPC controller will solve a convex optimization step. The MPC accelerator can also be exploited in other different application scenarios where control quality is needed.

Status: Available

Looking for 1-2 Semester/Master students
Contact: Andrea Bartolini

Prerequisites

VLSI I
VLSI II (recommended)

Character

20% Theory
40% ASIC Design
40% EDA tools

Professor

Luca Benini

↑ top

Detailed Task Description

Goals

Practical Details

Results

Links

  1. A. Bartolini, M. Cacciari, A. Tilli and L. Benini, "Thermal and energy management of high-performance multicores: Distributed and self-calibrating model-predictive controller", IEEE Trans. on Parallel and Distributed Systems, vol. 24, no. 1, pp. 170–183, 2013
  2. F. Beneventi, A. Bartolini, A. Tilli, L. Benini. “An effective gray-box identification procedure for multicore thermal modelling”, IEEE Trans. on Computers, preprint, 28 Dec. 2012, DOI

↑ top