Difference between revisions of "High Speed FPGA Trigger Logic for Particle Physics Experiments"
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Latest revision as of 20:42, 30 January 2018
Contents
Short Description
This is a project by the Physics Department of ETH Zurich. If you are experienced in FPGA programming (VHDL) and want to spice up your knowledge with a real world, then this is your chance.
We are in the process of building a new trigger logic unit (a device that based on multiple inputs decides if it issues a signal for data taking or not). The Xilinx AC701 Development Board in combination with a recently designed and build interface board (see picture) will be used for the project. The work packages include:
- Testing the interface boards NIM/TTL in/outputs that connect to the AC701’s FMC connector and get familiar with the design of the unit and it’s purpose.
- Writing two architectures for the FPGA that can be interfaced with a MicroBlaze Softcore:
- A pulse generator
- A adjustable clock generator with 3-4 phase-shift able outputs
- Extending the HTTP Server running on the MicroBlaze to include the control parameters for the pulse generator and adjustable clock
- If interested: Commissioning of the unit in particle accelerator beam line experiment at PSI
Abstract of the project
Status: Available
- Looking for 1-2 Semester/Master students
- Contact: Christian Dorfer Dmitry Hits
Prerequisites
- VLSI I
Character
- 60% FPGA programming VHDL
- 30% SW development on MicroBlaze
- 10% Commissioning