Difference between revisions of "Investigation of Redox Processes in CBRAM"
(Created page with "thumb ==Short Description== Driven by Moore's scaling law, the size of the transistors, the active components of...")
m (Emborasa moved page GPU-Accelerated Nanoelectronic Device Simulations to Investigation of Redox Processes inCBRAM)
Revision as of 17:42, 3 September 2019
Driven by Moore's scaling law, the size of the transistors, the active components of integrated circuits, has been drastically reduced to reach the nanometer scale nowadays. To accelerate the innovation of a new transistor technology, it is advantageous in terms of cost and efficiency to first simulate their characteristics rather than directly fabricate and measure them. However, to accurately predict their performance, nanoelectronic devices such as the nanowire transistor depicted here must be simulated at the quantum mechanical level by solving the Schrödinger equation with open boundary conditions and an atomistic resolution, which induces a heavy computational burden. In effect, the resulting problem takes the form of several thousands sparse linear systems of equations, each of them being solved in parallel to minimize the computation time and allow for large device structures. A parallel sparse linear solver has been developed for that purpose that works with CPUs only. The goal of this project is to port this solver to GPUs using the CUDA language from NVIDIA and to boost nanodevice simulations. The new solver should be heterogeneous (MPI+CUDA) and general enough so that one single system of equations can be solved on several CPUs and GPUs.
- Looking for 1 Master student
- Contact: Mathieu Luisier
- Experience with CUDA or any other GPU language requested
- Knowledge about MPI and sparse linear solvers recommended
- 30% Theory
- 70% Implementation