Matteo Perotti

Matteo Perotti

---

I am is interested in everything is HW, from highly efficient low-power implementations to high-performance vector processors. I mainly work with RISC-​V architectures, but I am also secretly in love with the SW-​side of the world.

I come from Turin, Italy, where I received my Bachelor's and Master's Degrees from Politecnico di Torino.

Interests

---

• Computer and System Architectures
• Code-size optimization
• Floating-Point Arithmetic

Contact Information

---

• e-mail: mperotti@iis.ee.ethz.ch
• phone: +41 44 632 05 25
• office: ETZ J85

Projects

Available Projects

• Low Precision Ara for ML
• Extended Verification for Ara
• RVfplib

Projects In Progress

• Virtual Memory Ara
• New RVV 1.0 Vector Instructions for Ara
• Big Data Analytics Benchmarks for Ara

Completed Projects

• Spatz grows wings: Physical Implementation of a Vector-Powered Manycore System (2S)
• Efficient Execution of Transformers in RISC-V Vector Machines with Custom HW acceleration (M)
• Implementation of a Small and Energy-Efficient RISC-V-based Vector Accelerator (1M)
• Multi issue OoO Ariane Backend (M)
• Physical Implementation of Ara, PULP's Vector Machine (1-2S)
• Investigation of the high-performance multi-threaded OoO IBM A2O Core (1-3S)