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Difference between revisions of "NAND Flash Open Research Platform"

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Revision as of 11:03, 11 July 2019

Short Description

SSDs today are ubiquitous. However, they are usually often closed source and because of it assessing their security is not an easy task. In particular, it most often requires reverse engineering their firmware, which is as complex as a small OS on modern SSDs. While getting the firmware is not trivial, even when the SSD's firmware image can be obtained, it is still not easy to observe the I/O behavior of the NAND flash. While communication with the host is easily observable, communication between the SSD controller and the NAND Flash chips requires tapping into the PCB bus on already assembled SSDs. While nowadays there exist some commercial boards able to analyze the error characteristics of flash chips directly, they are costly and difficult to customize. We want to build an open platform that allows to directly interface to NAND flash ICs to study their behavior and argue about their security.

Status: Available

Looking for 1-2 Semester/Master students
Contact: Moritz Schneider, Ivan Puddu

Prerequisites

VLSI I

Character

20% Theory
40% PCB Design
40% Firmware

Professor

Luca Benini
Srdjan Capkun

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Detailed Task Description

In this project, we want to investigate the behavior of the NAND flash chips. You would design a custom, open source, and programmable board able to interface with raw NAND flash chips. In particular, read, write and re-program them directly. This project would involve designing a PCB daughterboard that can be connected to an FPGA or microcontroller.

Goals

Practical Details

Results

Links

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