This master thesis/semester thesis (Summer Semester 2021) is part of an EU project (FRACTAL) with more than 25 partners involved. The students will collaborate with ACP, a Zurich-based company specialized in integrated circuits for cellular communications.
The goal of this project is to implement is a low-cost solution to make mechanical meters smart, instead of replacing them with costly devices.
The students will realize a Smart Meter, an IoT system based on:
- The Parallel Ultra Low Power (PULP) platform, developed here at IIS, on FPGA. PULP is an open-source multi-core platform achieving leading-edge energy-efficiency and featuring widely-tunable performance
- a modem for wireless connectivity
- an ultra-low power camera
The system will periodically wake up, take a picture, process the image extracting the number displayed on the meters and transmit the value wirelessly. A wide range of different meters exists and many of them are located in environments with difficult lighting conditions. Therefore, analyzing the image on the edge will require robust pattern recognition algorithms.
The smart meters will be employed in an IoT scenario. The automatic recognition of the number displayed on the meter and its wireless transmission will replace the need for a person to read the meter and annotate the measurement.
- Familiarity with C programming
- Baisc knowledge about FPGAs - having followed the VLSI I course is recommended
- Programming the RISC-V core available in PULP (microcontroller programming - C)
- Interfacing PULP with the ultra-low-power camera
- Interfacing PULP with the modem for wireless connectivity
- Implementation of a pattern recognition algorithm on a microcontroller
- Testing the wireless communication