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Showing below up to 100 results in range #1 to #100.

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  1. Project Plan‏‎ (13:41, 16 January 2014)
  2. Coding Guidelines‏‎ (13:42, 16 January 2014)
  3. Project Meetings‏‎ (13:47, 16 January 2014)
  4. Design Review‏‎ (13:48, 16 January 2014)
  5. Assessment of novel photovoltaic architectures by circuit simulation‏‎ (11:07, 17 January 2014)
  6. Processing of 3D Micro-tomography data for Lithium Ion Batteries‏‎ (11:12, 17 January 2014)
  7. Developing High Efficiency Batteries for Electric Cars‏‎ (11:28, 17 January 2014)
  8. Compressed Sensing Reconstruction on FPGA‏‎ (17:56, 28 January 2014)
  9. High-Resolution Large-Bandwidth Delta-Sigma A/D Converters in Ultra-Scaled CMOS‏‎ (16:28, 29 January 2014)
  10. Multi-Band Receiver Design for LTE Mobile Communication‏‎ (16:47, 29 January 2014)
  11. High-Resolution, Calibrated Folding ADCs‏‎ (17:02, 29 January 2014)
  12. Ultra-low power processor design‏‎ (18:01, 30 January 2014)
  13. Praxisgerechte Berechnung von Switching Noise in VLSI-Schaltungen‏‎ (13:58, 8 March 2014)
  14. Wiederverwendung (reuse) ganzer Funktionsblöcke beim VLSI-Entwurf‏‎ (14:00, 8 March 2014)
  15. Reconfigurability of SHA-3 candidates‏‎ (13:11, 13 March 2014)
  16. Variability Tolerant Ultra Low Power Cluster‏‎ (09:52, 27 March 2014)
  17. Hardware Support for IDE in Multicore Environment‏‎ (09:58, 27 March 2014)
  18. Christoph Keller‏‎ (13:21, 27 March 2014)
  19. Weekly Reports‏‎ (15:22, 22 April 2014)
  20. NORX - an AEAD algorithm for the CAESAR competition‏‎ (10:13, 13 June 2014)
  21. Image Sensor Interface and Pre-processing‏‎ (17:53, 6 December 2014)
  22. Atretter‏‎ (10:20, 12 December 2014)
  23. Ultra-High-Efficiency Power Supply Management for Ultra-Low-Power Systems on Chip‏‎ (17:06, 3 February 2015)
  24. ASIC Design of a Gaussian Message Passing Processor‏‎ (07:50, 4 February 2015)
  25. ASIC Design of a Sigma Point Processor‏‎ (08:16, 4 February 2015)
  26. Hardware Accelerator for Model Predictive Controller‏‎ (12:47, 5 February 2015)
  27. A Novel Constrained-Viterbi Algorithm with Linear Equalization and Grouping Assistance‏‎ (09:43, 9 February 2015)
  28. Turbo Decoder Design for High Code Rates‏‎ (09:45, 9 February 2015)
  29. High Throughput Turbo Decoder Design‏‎ (09:46, 9 February 2015)
  30. IcySoC‏‎ (11:48, 9 February 2015)
  31. Near-Optimal Reduced-Complexity Sequence Detectors for TD-HSPA‏‎ (12:49, 9 February 2015)
  32. Channel Decoding for TD-HSPA‏‎ (12:55, 9 February 2015)
  33. Exploitation of Inherent Error Resilience of Wireless Systems under Unreliable Silicon‏‎ (12:56, 9 February 2015)
  34. Data Mapping for Unreliable Memories‏‎ (12:56, 9 February 2015)
  35. Multiuser Equalization and Detection for 3GPP TD-SCDMA‏‎ (13:07, 9 February 2015)
  36. Android reliability governor‏‎ (16:24, 9 February 2015)
  37. Ultra Low Power Wake Up Radio for Wireless Sensor Network‏‎ (18:54, 9 February 2015)
  38. Infrared Wake Up Radio‏‎ (18:55, 9 February 2015)
  39. Ambient RF Energy harvesting for Wireless Sensor Network‏‎ (18:56, 9 February 2015)
  40. Thermal Control of Mobile Devices‏‎ (10:03, 10 February 2015)
  41. Successive Interference Cancellation for 3G Downlink‏‎ (17:59, 10 February 2015)
  42. Channel Estimation for TD-HSPA‏‎ (18:00, 10 February 2015)
  43. FPGA‏‎ (18:50, 10 February 2015)
  44. ASIC‏‎ (18:52, 10 February 2015)
  45. Design and Implementation of ultra low power vision system‏‎ (15:46, 11 February 2015)
  46. Audio‏‎ (16:28, 11 February 2015)
  47. Quantum Key Secured 100 Gbit/s Payload Encryption and its High-Speed Network Interfaces‏‎ (19:06, 17 February 2015)
  48. Hybrid Analog/Digital Leveling Loop for Very-Low-Distortion Oscillator‏‎ (19:06, 17 February 2015)
  49. Audio DAC Conversion Jitter Measurement System‏‎ (19:06, 17 February 2015)
  50. Efficient Digital Signal Processing in High-Channel-Count High-Frame-Rate 3D Ultrasound Imaging Systems‏‎ (19:10, 17 February 2015)
  51. Soft-Output Viterbi Equalizer as part of Evolved EDGE baseband ASIC‏‎ (09:04, 18 February 2015)
  52. Interference Cancellation for Evolved EDGE on the RazorEDGE baseband ASIC‏‎ (09:06, 18 February 2015)
  53. Norbert Felber‏‎ (12:56, 18 February 2015)
  54. Philipp Schönle‏‎ (09:52, 10 March 2015)
  55. Flexible Front-End Circuit for Biomedical Data Acquisition‏‎ (09:53, 10 March 2015)
  56. Wireless Biomedical Signal Acquisition Device‏‎ (09:54, 10 March 2015)
  57. Benjamin Sporrer‏‎ (12:01, 10 March 2015)
  58. High Performance Cellular Receivers in Very Advanced CMOS‏‎ (12:02, 10 March 2015)
  59. Telecommunications‏‎ (16:42, 24 March 2015)
  60. Design and Implementation of a Convolutional Neural Network Accelerator ASIC‏‎ (18:45, 24 March 2015)
  61. Putting Together What Fits Together - GrÆStl‏‎ (11:01, 26 March 2015)
  62. SHAre - An application Specific Instruction Set Processor for SHA-2/3‏‎ (11:09, 26 March 2015)
  63. High-Throughput Authenticated Encryption Architectures based on Block Ciphers‏‎ (11:25, 26 March 2015)
  64. A Unified-Multiplier Based Hardware Architecture for Elliptic Curve Cryptography‏‎ (11:26, 26 March 2015)
  65. A Trustworthy Three-Factor Authentication System‏‎ (13:01, 26 March 2015)
  66. High-Speed DigRF-v4 Implementation‏‎ (10:50, 15 April 2015)
  67. A Multiview Synthesis Core in 65 nm CMOS‏‎ (14:49, 13 May 2015)
  68. Feature Extraction with Binarized Descriptors: ASIC Implementation and FPGA Environment‏‎ (14:57, 13 May 2015)
  69. Real-time View Synthesis using Image Domain Warping‏‎ (15:04, 13 May 2015)
  70. Evolved EDGE Physical Layer Incremental Redundancy Architecture‏‎ (13:12, 27 May 2015)
  71. MatPHY: An Open-Source Physical Layer Development Framework‏‎ (13:14, 27 May 2015)
  72. Autonomous Smart Watches: Hardware and Software Desing‏‎ (10:59, 28 July 2015)
  73. A Wearable System for long term monitoring of human physiological parameters with E skin sensors‏‎ (10:59, 28 July 2015)
  74. Eye movements‏‎ (13:43, 29 July 2015)
  75. RazorEDGE: An Evolved EDGE DBB ASIC‏‎ (16:15, 1 September 2015)
  76. Hardware/software co-programming on the Parallella platform‏‎ (13:26, 2 September 2015)
  77. Real-Time Stereo to Multiview Conversion‏‎ (08:09, 23 October 2015)
  78. Active-Set QP Solver on FPGA‏‎ (12:09, 2 November 2015)
  79. Vector Processor for In-Memory Computing‏‎ (12:10, 2 November 2015)
  80. An FPGA-Based Testbed for 3G Mobile Communications Receivers‏‎ (15:42, 9 December 2015)
  81. EvaLTE: A 2G/3G/4G Cellular Transceiver FMC‏‎ (16:07, 17 December 2015)
  82. EvalEDGE: A 2G Cellular Transceiver FMC‏‎ (16:10, 17 December 2015)
  83. Design of a Digital Audio Module for Ultra-Low Power Cellular Applications‏‎ (17:15, 17 December 2015)
  84. A Wireless Sensor Network for a Smart LED Lighting control‏‎ (11:02, 27 January 2016)
  85. Bateryless Heart Rate Monitoring‏‎ (14:21, 28 January 2016)
  86. Real-Time Optical Flow Using Neural Networks‏‎ (10:22, 5 February 2016)
  87. Scattering Networks for Scene Labeling‏‎ (10:29, 5 February 2016)
  88. Improving Scene Labeling with Hyperspectral Data‏‎ (10:29, 5 February 2016)
  89. FFT-based Convolutional Network Accelerator‏‎ (10:30, 5 February 2016)
  90. Real-Time Pedestrian Detection For Privacy Enhancement‏‎ (12:17, 5 February 2016)
  91. Autonomous Smart Watches: Toward an ultra low power microphone detector with events classification‏‎ (11:11, 16 February 2016)
  92. Low-power Clock Generation Solutions for 65nm Technology‏‎ (18:37, 3 March 2016)
  93. Final Report‏‎ (09:22, 10 March 2016)
  94. Matthias Korb‏‎ (13:11, 21 March 2016)
  95. NextGenChannelDec‏‎ (14:31, 13 April 2016)
  96. ASIC Implementation of High-Throughput Next Generation Turbo Decoders‏‎ (10:12, 14 April 2016)
  97. Channel Estimation and Equalization for LTE Advanced‏‎ (10:13, 14 April 2016)
  98. Time Synchronization for 3G Mobile Communications‏‎ (10:22, 14 April 2016)
  99. Signal to Noise Ratio Estimation for 3G standards‏‎ (10:23, 14 April 2016)
  100. High-Throughput Hardware Implementations of Authenticated Encryption Algorithms‏‎ (12:13, 14 April 2016)

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