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- Project Plan (13:41, 16 January 2014)
- Coding Guidelines (13:42, 16 January 2014)
- Project Meetings (13:47, 16 January 2014)
- Design Review (13:48, 16 January 2014)
- Assessment of novel photovoltaic architectures by circuit simulation (11:07, 17 January 2014)
- Processing of 3D Micro-tomography data for Lithium Ion Batteries (11:12, 17 January 2014)
- Developing High Efficiency Batteries for Electric Cars (11:28, 17 January 2014)
- Compressed Sensing Reconstruction on FPGA (17:56, 28 January 2014)
- High-Resolution Large-Bandwidth Delta-Sigma A/D Converters in Ultra-Scaled CMOS (16:28, 29 January 2014)
- Multi-Band Receiver Design for LTE Mobile Communication (16:47, 29 January 2014)
- High-Resolution, Calibrated Folding ADCs (17:02, 29 January 2014)
- Ultra-low power processor design (18:01, 30 January 2014)
- Praxisgerechte Berechnung von Switching Noise in VLSI-Schaltungen (13:58, 8 March 2014)
- Wiederverwendung (reuse) ganzer Funktionsblöcke beim VLSI-Entwurf (14:00, 8 March 2014)
- Reconfigurability of SHA-3 candidates (13:11, 13 March 2014)
- Variability Tolerant Ultra Low Power Cluster (09:52, 27 March 2014)
- Hardware Support for IDE in Multicore Environment (09:58, 27 March 2014)
- Christoph Keller (13:21, 27 March 2014)
- NORX - an AEAD algorithm for the CAESAR competition (10:13, 13 June 2014)
- Image Sensor Interface and Pre-processing (17:53, 6 December 2014)
- Atretter (10:20, 12 December 2014)
- Ultra-High-Efficiency Power Supply Management for Ultra-Low-Power Systems on Chip (17:06, 3 February 2015)
- A Novel Constrained-Viterbi Algorithm with Linear Equalization and Grouping Assistance (09:43, 9 February 2015)
- Turbo Decoder Design for High Code Rates (09:45, 9 February 2015)
- High Throughput Turbo Decoder Design (09:46, 9 February 2015)
- IcySoC (11:48, 9 February 2015)
- Near-Optimal Reduced-Complexity Sequence Detectors for TD-HSPA (12:49, 9 February 2015)
- Channel Decoding for TD-HSPA (12:55, 9 February 2015)
- Exploitation of Inherent Error Resilience of Wireless Systems under Unreliable Silicon (12:56, 9 February 2015)
- Data Mapping for Unreliable Memories (12:56, 9 February 2015)
- Multiuser Equalization and Detection for 3GPP TD-SCDMA (13:07, 9 February 2015)
- Android reliability governor (16:24, 9 February 2015)
- Ultra Low Power Wake Up Radio for Wireless Sensor Network (18:54, 9 February 2015)
- Infrared Wake Up Radio (18:55, 9 February 2015)
- Ambient RF Energy harvesting for Wireless Sensor Network (18:56, 9 February 2015)
- Thermal Control of Mobile Devices (10:03, 10 February 2015)
- Successive Interference Cancellation for 3G Downlink (17:59, 10 February 2015)
- Channel Estimation for TD-HSPA (18:00, 10 February 2015)
- FPGA (18:50, 10 February 2015)
- ASIC (18:52, 10 February 2015)
- Design and Implementation of ultra low power vision system (15:46, 11 February 2015)
- Audio (16:28, 11 February 2015)
- Quantum Key Secured 100 Gbit/s Payload Encryption and its High-Speed Network Interfaces (19:06, 17 February 2015)
- Hybrid Analog/Digital Leveling Loop for Very-Low-Distortion Oscillator (19:06, 17 February 2015)
- Audio DAC Conversion Jitter Measurement System (19:06, 17 February 2015)
- Efficient Digital Signal Processing in High-Channel-Count High-Frame-Rate 3D Ultrasound Imaging Systems (19:10, 17 February 2015)
- Soft-Output Viterbi Equalizer as part of Evolved EDGE baseband ASIC (09:04, 18 February 2015)
- Interference Cancellation for Evolved EDGE on the RazorEDGE baseband ASIC (09:06, 18 February 2015)
- Norbert Felber (12:56, 18 February 2015)
- Philipp Schönle (09:52, 10 March 2015)
- Flexible Front-End Circuit for Biomedical Data Acquisition (09:53, 10 March 2015)
- Wireless Biomedical Signal Acquisition Device (09:54, 10 March 2015)
- Benjamin Sporrer (12:01, 10 March 2015)
- High Performance Cellular Receivers in Very Advanced CMOS (12:02, 10 March 2015)
- Telecommunications (16:42, 24 March 2015)
- Design and Implementation of a Convolutional Neural Network Accelerator ASIC (18:45, 24 March 2015)
- Putting Together What Fits Together - GrÆStl (11:01, 26 March 2015)
- SHAre - An application Specific Instruction Set Processor for SHA-2/3 (11:09, 26 March 2015)
- High-Throughput Authenticated Encryption Architectures based on Block Ciphers (11:25, 26 March 2015)
- A Unified-Multiplier Based Hardware Architecture for Elliptic Curve Cryptography (11:26, 26 March 2015)
- A Trustworthy Three-Factor Authentication System (13:01, 26 March 2015)
- A Multiview Synthesis Core in 65 nm CMOS (14:49, 13 May 2015)
- Feature Extraction with Binarized Descriptors: ASIC Implementation and FPGA Environment (14:57, 13 May 2015)
- Real-time View Synthesis using Image Domain Warping (15:04, 13 May 2015)
- Evolved EDGE Physical Layer Incremental Redundancy Architecture (13:12, 27 May 2015)
- MatPHY: An Open-Source Physical Layer Development Framework (13:14, 27 May 2015)
- Autonomous Smart Watches: Hardware and Software Desing (10:59, 28 July 2015)
- A Wearable System for long term monitoring of human physiological parameters with E skin sensors (10:59, 28 July 2015)
- Eye movements (13:43, 29 July 2015)
- RazorEDGE: An Evolved EDGE DBB ASIC (16:15, 1 September 2015)
- Hardware/software co-programming on the Parallella platform (13:26, 2 September 2015)
- Real-Time Stereo to Multiview Conversion (08:09, 23 October 2015)
- Active-Set QP Solver on FPGA (12:09, 2 November 2015)
- Vector Processor for In-Memory Computing (12:10, 2 November 2015)
- An FPGA-Based Testbed for 3G Mobile Communications Receivers (15:42, 9 December 2015)
- EvaLTE: A 2G/3G/4G Cellular Transceiver FMC (16:07, 17 December 2015)
- EvalEDGE: A 2G Cellular Transceiver FMC (16:10, 17 December 2015)
- Design of a Digital Audio Module for Ultra-Low Power Cellular Applications (17:15, 17 December 2015)
- A Wireless Sensor Network for a Smart LED Lighting control (11:02, 27 January 2016)
- Bateryless Heart Rate Monitoring (14:21, 28 January 2016)
- Real-Time Optical Flow Using Neural Networks (10:22, 5 February 2016)
- Scattering Networks for Scene Labeling (10:29, 5 February 2016)
- Improving Scene Labeling with Hyperspectral Data (10:29, 5 February 2016)
- FFT-based Convolutional Network Accelerator (10:30, 5 February 2016)
- Real-Time Pedestrian Detection For Privacy Enhancement (12:17, 5 February 2016)
- Autonomous Smart Watches: Toward an ultra low power microphone detector with events classification (11:11, 16 February 2016)
- Low-power Clock Generation Solutions for 65nm Technology (18:37, 3 March 2016)
- Final Report (09:22, 10 March 2016)
- NextGenChannelDec (14:31, 13 April 2016)
- ASIC Implementation of High-Throughput Next Generation Turbo Decoders (10:12, 14 April 2016)
- Channel Estimation and Equalization for LTE Advanced (10:13, 14 April 2016)
- Time Synchronization for 3G Mobile Communications (10:22, 14 April 2016)
- Signal to Noise Ratio Estimation for 3G standards (10:23, 14 April 2016)
- High-Throughput Hardware Implementations of Authenticated Encryption Algorithms (12:13, 14 April 2016)
- GSM Voice Capacity Evolution - VAMOS (16:45, 14 April 2016)
- 4th Generation Synchronization (16:56, 14 April 2016)
- Baseband Processor Development for 4G IoT (16:58, 14 April 2016)
- Beat DigRF (16:58, 14 April 2016)
- Research (18:38, 14 April 2016)
- Spatio-Temporal Video Filtering (18:40, 14 April 2016)