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  1. Project Plan‏‎ (14:41, 16 January 2014)
  2. Coding Guidelines‏‎ (14:42, 16 January 2014)
  3. Project Meetings‏‎ (14:47, 16 January 2014)
  4. Design Review‏‎ (14:48, 16 January 2014)
  5. Assessment of novel photovoltaic architectures by circuit simulation‏‎ (12:07, 17 January 2014)
  6. Processing of 3D Micro-tomography data for Lithium Ion Batteries‏‎ (12:12, 17 January 2014)
  7. Developing High Efficiency Batteries for Electric Cars‏‎ (12:28, 17 January 2014)
  8. Compressed Sensing Reconstruction on FPGA‏‎ (18:56, 28 January 2014)
  9. High-Resolution Large-Bandwidth Delta-Sigma A/D Converters in Ultra-Scaled CMOS‏‎ (17:28, 29 January 2014)
  10. Multi-Band Receiver Design for LTE Mobile Communication‏‎ (17:47, 29 January 2014)
  11. High-Resolution, Calibrated Folding ADCs‏‎ (18:02, 29 January 2014)
  12. Ultra-low power processor design‏‎ (19:01, 30 January 2014)
  13. Praxisgerechte Berechnung von Switching Noise in VLSI-Schaltungen‏‎ (14:58, 8 March 2014)
  14. Wiederverwendung (reuse) ganzer Funktionsblöcke beim VLSI-Entwurf‏‎ (15:00, 8 March 2014)
  15. Reconfigurability of SHA-3 candidates‏‎ (14:11, 13 March 2014)
  16. Variability Tolerant Ultra Low Power Cluster‏‎ (10:52, 27 March 2014)
  17. Hardware Support for IDE in Multicore Environment‏‎ (10:58, 27 March 2014)
  18. Christoph Keller‏‎ (14:21, 27 March 2014)
  19. NORX - an AEAD algorithm for the CAESAR competition‏‎ (11:13, 13 June 2014)
  20. Image Sensor Interface and Pre-processing‏‎ (18:53, 6 December 2014)
  21. Atretter‏‎ (11:20, 12 December 2014)
  22. Ultra-High-Efficiency Power Supply Management for Ultra-Low-Power Systems on Chip‏‎ (18:06, 3 February 2015)
  23. A Novel Constrained-Viterbi Algorithm with Linear Equalization and Grouping Assistance‏‎ (10:43, 9 February 2015)
  24. Turbo Decoder Design for High Code Rates‏‎ (10:45, 9 February 2015)
  25. High Throughput Turbo Decoder Design‏‎ (10:46, 9 February 2015)
  26. IcySoC‏‎ (12:48, 9 February 2015)
  27. Near-Optimal Reduced-Complexity Sequence Detectors for TD-HSPA‏‎ (13:49, 9 February 2015)
  28. Channel Decoding for TD-HSPA‏‎ (13:55, 9 February 2015)
  29. Exploitation of Inherent Error Resilience of Wireless Systems under Unreliable Silicon‏‎ (13:56, 9 February 2015)
  30. Data Mapping for Unreliable Memories‏‎ (13:56, 9 February 2015)
  31. Multiuser Equalization and Detection for 3GPP TD-SCDMA‏‎ (14:07, 9 February 2015)
  32. Android reliability governor‏‎ (17:24, 9 February 2015)
  33. Ultra Low Power Wake Up Radio for Wireless Sensor Network‏‎ (19:54, 9 February 2015)
  34. Infrared Wake Up Radio‏‎ (19:55, 9 February 2015)
  35. Ambient RF Energy harvesting for Wireless Sensor Network‏‎ (19:56, 9 February 2015)
  36. Thermal Control of Mobile Devices‏‎ (11:03, 10 February 2015)
  37. Successive Interference Cancellation for 3G Downlink‏‎ (18:59, 10 February 2015)
  38. Channel Estimation for TD-HSPA‏‎ (19:00, 10 February 2015)
  39. FPGA‏‎ (19:50, 10 February 2015)
  40. ASIC‏‎ (19:52, 10 February 2015)
  41. Design and Implementation of ultra low power vision system‏‎ (16:46, 11 February 2015)
  42. Audio‏‎ (17:28, 11 February 2015)
  43. Quantum Key Secured 100 Gbit/s Payload Encryption and its High-Speed Network Interfaces‏‎ (20:06, 17 February 2015)
  44. Hybrid Analog/Digital Leveling Loop for Very-Low-Distortion Oscillator‏‎ (20:06, 17 February 2015)
  45. Audio DAC Conversion Jitter Measurement System‏‎ (20:06, 17 February 2015)
  46. Efficient Digital Signal Processing in High-Channel-Count High-Frame-Rate 3D Ultrasound Imaging Systems‏‎ (20:10, 17 February 2015)
  47. Soft-Output Viterbi Equalizer as part of Evolved EDGE baseband ASIC‏‎ (10:04, 18 February 2015)
  48. Interference Cancellation for Evolved EDGE on the RazorEDGE baseband ASIC‏‎ (10:06, 18 February 2015)
  49. Norbert Felber‏‎ (13:56, 18 February 2015)
  50. Philipp Schönle‏‎ (10:52, 10 March 2015)
  51. Flexible Front-End Circuit for Biomedical Data Acquisition‏‎ (10:53, 10 March 2015)
  52. Wireless Biomedical Signal Acquisition Device‏‎ (10:54, 10 March 2015)
  53. Benjamin Sporrer‏‎ (13:01, 10 March 2015)
  54. High Performance Cellular Receivers in Very Advanced CMOS‏‎ (13:02, 10 March 2015)
  55. Telecommunications‏‎ (17:42, 24 March 2015)
  56. Design and Implementation of a Convolutional Neural Network Accelerator ASIC‏‎ (19:45, 24 March 2015)
  57. Putting Together What Fits Together - GrÆStl‏‎ (12:01, 26 March 2015)
  58. SHAre - An application Specific Instruction Set Processor for SHA-2/3‏‎ (12:09, 26 March 2015)
  59. High-Throughput Authenticated Encryption Architectures based on Block Ciphers‏‎ (12:25, 26 March 2015)
  60. A Unified-Multiplier Based Hardware Architecture for Elliptic Curve Cryptography‏‎ (12:26, 26 March 2015)
  61. A Trustworthy Three-Factor Authentication System‏‎ (14:01, 26 March 2015)
  62. A Multiview Synthesis Core in 65 nm CMOS‏‎ (15:49, 13 May 2015)
  63. Feature Extraction with Binarized Descriptors: ASIC Implementation and FPGA Environment‏‎ (15:57, 13 May 2015)
  64. Real-time View Synthesis using Image Domain Warping‏‎ (16:04, 13 May 2015)
  65. Evolved EDGE Physical Layer Incremental Redundancy Architecture‏‎ (14:12, 27 May 2015)
  66. MatPHY: An Open-Source Physical Layer Development Framework‏‎ (14:14, 27 May 2015)
  67. Autonomous Smart Watches: Hardware and Software Desing‏‎ (11:59, 28 July 2015)
  68. A Wearable System for long term monitoring of human physiological parameters with E skin sensors‏‎ (11:59, 28 July 2015)
  69. Eye movements‏‎ (14:43, 29 July 2015)
  70. RazorEDGE: An Evolved EDGE DBB ASIC‏‎ (17:15, 1 September 2015)
  71. Hardware/software co-programming on the Parallella platform‏‎ (14:26, 2 September 2015)
  72. Real-Time Stereo to Multiview Conversion‏‎ (09:09, 23 October 2015)
  73. Active-Set QP Solver on FPGA‏‎ (13:09, 2 November 2015)
  74. Vector Processor for In-Memory Computing‏‎ (13:10, 2 November 2015)
  75. An FPGA-Based Testbed for 3G Mobile Communications Receivers‏‎ (16:42, 9 December 2015)
  76. EvaLTE: A 2G/3G/4G Cellular Transceiver FMC‏‎ (17:07, 17 December 2015)
  77. EvalEDGE: A 2G Cellular Transceiver FMC‏‎ (17:10, 17 December 2015)
  78. Design of a Digital Audio Module for Ultra-Low Power Cellular Applications‏‎ (18:15, 17 December 2015)
  79. A Wireless Sensor Network for a Smart LED Lighting control‏‎ (12:02, 27 January 2016)
  80. Bateryless Heart Rate Monitoring‏‎ (15:21, 28 January 2016)
  81. Real-Time Optical Flow Using Neural Networks‏‎ (11:22, 5 February 2016)
  82. Scattering Networks for Scene Labeling‏‎ (11:29, 5 February 2016)
  83. Improving Scene Labeling with Hyperspectral Data‏‎ (11:29, 5 February 2016)
  84. FFT-based Convolutional Network Accelerator‏‎ (11:30, 5 February 2016)
  85. Real-Time Pedestrian Detection For Privacy Enhancement‏‎ (13:17, 5 February 2016)
  86. Autonomous Smart Watches: Toward an ultra low power microphone detector with events classification‏‎ (12:11, 16 February 2016)
  87. Low-power Clock Generation Solutions for 65nm Technology‏‎ (19:37, 3 March 2016)
  88. Final Report‏‎ (10:22, 10 March 2016)
  89. NextGenChannelDec‏‎ (15:31, 13 April 2016)
  90. ASIC Implementation of High-Throughput Next Generation Turbo Decoders‏‎ (11:12, 14 April 2016)
  91. Channel Estimation and Equalization for LTE Advanced‏‎ (11:13, 14 April 2016)
  92. Time Synchronization for 3G Mobile Communications‏‎ (11:22, 14 April 2016)
  93. Signal to Noise Ratio Estimation for 3G standards‏‎ (11:23, 14 April 2016)
  94. High-Throughput Hardware Implementations of Authenticated Encryption Algorithms‏‎ (13:13, 14 April 2016)
  95. GSM Voice Capacity Evolution - VAMOS‏‎ (17:45, 14 April 2016)
  96. 4th Generation Synchronization‏‎ (17:56, 14 April 2016)
  97. Baseband Processor Development for 4G IoT‏‎ (17:58, 14 April 2016)
  98. Beat DigRF‏‎ (17:58, 14 April 2016)
  99. Research‏‎ (19:38, 14 April 2016)
  100. Spatio-Temporal Video Filtering‏‎ (19:40, 14 April 2016)

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