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  1. Project Plan‏‎ (13:41, 16 January 2014)
  2. Coding Guidelines‏‎ (13:42, 16 January 2014)
  3. Project Meetings‏‎ (13:47, 16 January 2014)
  4. Design Review‏‎ (13:48, 16 January 2014)
  5. Assessment of novel photovoltaic architectures by circuit simulation‏‎ (11:07, 17 January 2014)
  6. Processing of 3D Micro-tomography data for Lithium Ion Batteries‏‎ (11:12, 17 January 2014)
  7. Developing High Efficiency Batteries for Electric Cars‏‎ (11:28, 17 January 2014)
  8. Compressed Sensing Reconstruction on FPGA‏‎ (17:56, 28 January 2014)
  9. High-Resolution Large-Bandwidth Delta-Sigma A/D Converters in Ultra-Scaled CMOS‏‎ (16:28, 29 January 2014)
  10. Multi-Band Receiver Design for LTE Mobile Communication‏‎ (16:47, 29 January 2014)
  11. High-Resolution, Calibrated Folding ADCs‏‎ (17:02, 29 January 2014)
  12. Ultra-low power processor design‏‎ (18:01, 30 January 2014)
  13. Praxisgerechte Berechnung von Switching Noise in VLSI-Schaltungen‏‎ (13:58, 8 March 2014)
  14. Wiederverwendung (reuse) ganzer Funktionsblöcke beim VLSI-Entwurf‏‎ (14:00, 8 March 2014)
  15. Reconfigurability of SHA-3 candidates‏‎ (13:11, 13 March 2014)
  16. Variability Tolerant Ultra Low Power Cluster‏‎ (09:52, 27 March 2014)
  17. Hardware Support for IDE in Multicore Environment‏‎ (09:58, 27 March 2014)
  18. Christoph Keller‏‎ (13:21, 27 March 2014)
  19. Weekly Reports‏‎ (15:22, 22 April 2014)
  20. NORX - an AEAD algorithm for the CAESAR competition‏‎ (10:13, 13 June 2014)
  21. Image Sensor Interface and Pre-processing‏‎ (17:53, 6 December 2014)
  22. Atretter‏‎ (10:20, 12 December 2014)
  23. Ultra-High-Efficiency Power Supply Management for Ultra-Low-Power Systems on Chip‏‎ (17:06, 3 February 2015)
  24. ASIC Design of a Gaussian Message Passing Processor‏‎ (07:50, 4 February 2015)
  25. ASIC Design of a Sigma Point Processor‏‎ (08:16, 4 February 2015)
  26. Hardware Accelerator for Model Predictive Controller‏‎ (12:47, 5 February 2015)
  27. A Novel Constrained-Viterbi Algorithm with Linear Equalization and Grouping Assistance‏‎ (09:43, 9 February 2015)
  28. Turbo Decoder Design for High Code Rates‏‎ (09:45, 9 February 2015)
  29. High Throughput Turbo Decoder Design‏‎ (09:46, 9 February 2015)
  30. IcySoC‏‎ (11:48, 9 February 2015)
  31. Near-Optimal Reduced-Complexity Sequence Detectors for TD-HSPA‏‎ (12:49, 9 February 2015)
  32. Channel Decoding for TD-HSPA‏‎ (12:55, 9 February 2015)
  33. Exploitation of Inherent Error Resilience of Wireless Systems under Unreliable Silicon‏‎ (12:56, 9 February 2015)
  34. Data Mapping for Unreliable Memories‏‎ (12:56, 9 February 2015)
  35. Multiuser Equalization and Detection for 3GPP TD-SCDMA‏‎ (13:07, 9 February 2015)
  36. Android reliability governor‏‎ (16:24, 9 February 2015)
  37. Ultra Low Power Wake Up Radio for Wireless Sensor Network‏‎ (18:54, 9 February 2015)
  38. Infrared Wake Up Radio‏‎ (18:55, 9 February 2015)
  39. Ambient RF Energy harvesting for Wireless Sensor Network‏‎ (18:56, 9 February 2015)
  40. Thermal Control of Mobile Devices‏‎ (10:03, 10 February 2015)
  41. Successive Interference Cancellation for 3G Downlink‏‎ (17:59, 10 February 2015)
  42. Channel Estimation for TD-HSPA‏‎ (18:00, 10 February 2015)
  43. FPGA‏‎ (18:50, 10 February 2015)
  44. ASIC‏‎ (18:52, 10 February 2015)
  45. Design and Implementation of ultra low power vision system‏‎ (15:46, 11 February 2015)
  46. Audio‏‎ (16:28, 11 February 2015)
  47. Quantum Key Secured 100 Gbit/s Payload Encryption and its High-Speed Network Interfaces‏‎ (19:06, 17 February 2015)
  48. Hybrid Analog/Digital Leveling Loop for Very-Low-Distortion Oscillator‏‎ (19:06, 17 February 2015)
  49. Audio DAC Conversion Jitter Measurement System‏‎ (19:06, 17 February 2015)
  50. Efficient Digital Signal Processing in High-Channel-Count High-Frame-Rate 3D Ultrasound Imaging Systems‏‎ (19:10, 17 February 2015)
  51. Soft-Output Viterbi Equalizer as part of Evolved EDGE baseband ASIC‏‎ (09:04, 18 February 2015)
  52. Interference Cancellation for Evolved EDGE on the RazorEDGE baseband ASIC‏‎ (09:06, 18 February 2015)
  53. Norbert Felber‏‎ (12:56, 18 February 2015)
  54. Philipp Schönle‏‎ (09:52, 10 March 2015)
  55. Flexible Front-End Circuit for Biomedical Data Acquisition‏‎ (09:53, 10 March 2015)
  56. Wireless Biomedical Signal Acquisition Device‏‎ (09:54, 10 March 2015)
  57. Benjamin Sporrer‏‎ (12:01, 10 March 2015)
  58. High Performance Cellular Receivers in Very Advanced CMOS‏‎ (12:02, 10 March 2015)
  59. Telecommunications‏‎ (16:42, 24 March 2015)
  60. Design and Implementation of a Convolutional Neural Network Accelerator ASIC‏‎ (18:45, 24 March 2015)
  61. Putting Together What Fits Together - GrÆStl‏‎ (11:01, 26 March 2015)
  62. SHAre - An application Specific Instruction Set Processor for SHA-2/3‏‎ (11:09, 26 March 2015)
  63. High-Throughput Authenticated Encryption Architectures based on Block Ciphers‏‎ (11:25, 26 March 2015)
  64. A Unified-Multiplier Based Hardware Architecture for Elliptic Curve Cryptography‏‎ (11:26, 26 March 2015)
  65. A Trustworthy Three-Factor Authentication System‏‎ (13:01, 26 March 2015)
  66. High-Speed DigRF-v4 Implementation‏‎ (10:50, 15 April 2015)
  67. A Multiview Synthesis Core in 65 nm CMOS‏‎ (14:49, 13 May 2015)
  68. Feature Extraction with Binarized Descriptors: ASIC Implementation and FPGA Environment‏‎ (14:57, 13 May 2015)
  69. Real-time View Synthesis using Image Domain Warping‏‎ (15:04, 13 May 2015)
  70. Evolved EDGE Physical Layer Incremental Redundancy Architecture‏‎ (13:12, 27 May 2015)
  71. MatPHY: An Open-Source Physical Layer Development Framework‏‎ (13:14, 27 May 2015)
  72. Autonomous Smart Watches: Hardware and Software Desing‏‎ (10:59, 28 July 2015)
  73. A Wearable System for long term monitoring of human physiological parameters with E skin sensors‏‎ (10:59, 28 July 2015)
  74. Eye movements‏‎ (13:43, 29 July 2015)
  75. RazorEDGE: An Evolved EDGE DBB ASIC‏‎ (16:15, 1 September 2015)
  76. Hardware/software co-programming on the Parallella platform‏‎ (13:26, 2 September 2015)
  77. Real-Time Stereo to Multiview Conversion‏‎ (08:09, 23 October 2015)
  78. Active-Set QP Solver on FPGA‏‎ (12:09, 2 November 2015)
  79. Vector Processor for In-Memory Computing‏‎ (12:10, 2 November 2015)
  80. An FPGA-Based Testbed for 3G Mobile Communications Receivers‏‎ (15:42, 9 December 2015)
  81. EvaLTE: A 2G/3G/4G Cellular Transceiver FMC‏‎ (16:07, 17 December 2015)
  82. EvalEDGE: A 2G Cellular Transceiver FMC‏‎ (16:10, 17 December 2015)
  83. Design of a Digital Audio Module for Ultra-Low Power Cellular Applications‏‎ (17:15, 17 December 2015)
  84. A Wireless Sensor Network for a Smart LED Lighting control‏‎ (11:02, 27 January 2016)
  85. Bateryless Heart Rate Monitoring‏‎ (14:21, 28 January 2016)
  86. Real-Time Optical Flow Using Neural Networks‏‎ (10:22, 5 February 2016)
  87. Scattering Networks for Scene Labeling‏‎ (10:29, 5 February 2016)
  88. Improving Scene Labeling with Hyperspectral Data‏‎ (10:29, 5 February 2016)
  89. FFT-based Convolutional Network Accelerator‏‎ (10:30, 5 February 2016)
  90. Real-Time Pedestrian Detection For Privacy Enhancement‏‎ (12:17, 5 February 2016)
  91. Autonomous Smart Watches: Toward an ultra low power microphone detector with events classification‏‎ (11:11, 16 February 2016)
  92. Low-power Clock Generation Solutions for 65nm Technology‏‎ (18:37, 3 March 2016)
  93. Final Report‏‎ (09:22, 10 March 2016)
  94. Matthias Korb‏‎ (13:11, 21 March 2016)
  95. NextGenChannelDec‏‎ (14:31, 13 April 2016)
  96. ASIC Implementation of High-Throughput Next Generation Turbo Decoders‏‎ (10:12, 14 April 2016)
  97. Channel Estimation and Equalization for LTE Advanced‏‎ (10:13, 14 April 2016)
  98. Time Synchronization for 3G Mobile Communications‏‎ (10:22, 14 April 2016)
  99. Signal to Noise Ratio Estimation for 3G standards‏‎ (10:23, 14 April 2016)
  100. High-Throughput Hardware Implementations of Authenticated Encryption Algorithms‏‎ (12:13, 14 April 2016)
  101. GSM Voice Capacity Evolution - VAMOS‏‎ (16:45, 14 April 2016)
  102. 4th Generation Synchronization‏‎ (16:56, 14 April 2016)
  103. Baseband Processor Development for 4G IoT‏‎ (16:58, 14 April 2016)
  104. Beat DigRF‏‎ (16:58, 14 April 2016)
  105. Fast Wakeup From Deep Sleep State‏‎ (18:31, 14 April 2016)
  106. Research‏‎ (18:38, 14 April 2016)
  107. Spatio-Temporal Video Filtering‏‎ (18:40, 14 April 2016)
  108. 3D Turbo Decoder ASIC Realization‏‎ (11:33, 15 April 2016)
  109. Implementing Hibernation on the ARM Cortex M0‏‎ (10:59, 20 June 2016)
  110. Digital Transmitter for Cellular IoT‏‎ (15:41, 17 July 2016)
  111. An FPGA-Based Evaluation Platform for Mobile Communications‏‎ (15:05, 21 July 2016)
  112. Non-binary LDPC Decoder for Deep-Space Optical Communications‏‎ (15:05, 21 July 2016)
  113. Software‏‎ (12:45, 8 August 2016)
  114. Towards Self Sustainable UAVs‏‎ (19:45, 9 August 2016)
  115. Ultra Low Power Conversion Circuit For Batteryless Applications‏‎ (16:46, 10 August 2016)
  116. Libria‏‎ (08:35, 26 August 2016)
  117. Change-based Evaluation of Convolutional Neural Networks‏‎ (17:04, 29 August 2016)
  118. Learning Image Decompression with Convolutional Networks‏‎ (17:16, 29 August 2016)
  119. FPGA System Design for Computer Vision with Convolutional Neural Networks‏‎ (17:17, 29 August 2016)
  120. High-speed Scene Labeling on FPGA‏‎ (17:18, 29 August 2016)
  121. David J. Mack‏‎ (16:41, 31 August 2016)
  122. Eye tracking‏‎ (16:43, 31 August 2016)
  123. Linux Driver for fine-grain and low overhead access to on-chip performance counters‏‎ (14:55, 9 September 2016)
  124. Open Power-On Chip Controller Study and Integration‏‎ (14:57, 9 September 2016)
  125. PVT Dynamic Adaptation in PULPv3‏‎ (14:31, 13 September 2016)
  126. Compressed Sensing for Wireless Biosignal Monitoring‏‎ (09:20, 14 September 2016)
  127. Compressed Sensing vs JPEG‏‎ (09:24, 14 September 2016)
  128. On-chip clock synthesizer design and porting‏‎ (10:20, 14 September 2016)
  129. FPGA-based Implementation of a Novel Cell-Search Algorithm for Mobile Communications‏‎ (10:15, 23 September 2016)
  130. Physical Layer Implementation of HSPA+ 4G Mobile Transceiver‏‎ (10:16, 23 September 2016)
  131. Synchronization and Power Control Concepts for 3GPP TD-SCDMA‏‎ (10:17, 23 September 2016)
  132. Channel Estimation for 3GPP TD-SCDMA‏‎ (10:17, 23 September 2016)
  133. Design and Implementation of Digital Spiking Neurons for Ultra-Low-Power In-Cluster Coprocessors‏‎ (13:50, 30 November 2016)
  134. Ultra-Efficient Visual Classification on Movidius Myriad2‏‎ (13:57, 30 November 2016)
  135. Rethinking our Convolutional Network Accelerator Architecture‏‎ (17:52, 12 December 2016)
  136. Ultra Low-Power Oscillator‏‎ (17:58, 19 December 2016)
  137. Mauro Salomon‏‎ (10:37, 23 December 2016)
  138. OpenRISC SoC for Sensor Applications‏‎ (14:23, 23 December 2016)
  139. Bandwidth Extension with Carrier Aggregation for Mobile Gigabit-Communication‏‎ (15:13, 29 December 2016)
  140. LightProbe - Design of a High-Speed Optical Link‏‎ (09:55, 10 January 2017)
  141. LightProbe - Ultracompact Power Supply PCB‏‎ (09:56, 10 January 2017)
  142. DigitalUltrasoundHead‏‎ (10:52, 10 January 2017)
  143. Single-Bit-Synapse Spiking Neural System-on-Chip‏‎ (11:22, 13 January 2017)
  144. Tiny CNNs for Ultra-Efficient Object Detection on PULP‏‎ (12:19, 13 January 2017)
  145. Convolution Neural Networks on our Ultra-Low Power Mult-Core Plattform PULP‏‎ (12:01, 24 January 2017)
  146. Gomeza old project3‏‎ (17:04, 28 January 2017)
  147. Gomeza old project2‏‎ (17:04, 28 January 2017)
  148. Gomeza old project1‏‎ (17:04, 28 January 2017)
  149. Gomeza old project5‏‎ (17:25, 28 January 2017)
  150. Gomeza old project4‏‎ (18:08, 28 January 2017)
  151. VLSI Implementation Polar Decoder using High Level Synthesis‏‎ (22:10, 10 February 2017)
  152. Real-time eye movement analysis on a tablet computer‏‎ (11:57, 22 February 2017)
  153. Development of a syringe label reader for the neurocritical care unit‏‎ (12:00, 22 February 2017)
  154. Open Source Baseband Firmware for 2G Cellular Networks‏‎ (10:30, 24 February 2017)
  155. Power Saver Mode for Cellular Internet of Things Receivers‏‎ (16:59, 29 March 2017)
  156. Make Cellular Internet of Things Receivers Smart‏‎ (17:00, 29 March 2017)
  157. Build the Fastest 2G Modem Ever‏‎ (17:00, 29 March 2017)
  158. Digital Audio Processor for Cellular Applications‏‎ (17:01, 29 March 2017)
  159. High performance continous-time Delta-Sigma ADC for biomedical applications‏‎ (16:46, 2 May 2017)
  160. Deconvolution Accelerator for On-Chip Semi-Supervised Learning‏‎ (13:48, 30 May 2017)
  161. Autoencoder Accelerator for On-Chip Semi-Supervised Learning‏‎ (13:49, 30 May 2017)
  162. Towards Online Training of CNNs: Hebbian-Based Deep Learning‏‎ (18:50, 30 May 2017)
  163. Embedded Audio Source Localization Exploiting Coincidence Detection in Asynchronous Spike Streams‏‎ (18:52, 30 May 2017)
  164. LAPACK/BLAS for FPGA‏‎ (11:38, 1 June 2017)
  165. Efficient Implementation of an Active-Set QP Solver for FPGAs‏‎ (11:39, 1 June 2017)
  166. Accelerator for Spatio-Temporal Video Filtering‏‎ (11:40, 1 June 2017)
  167. Variable Bit Precision Logic for Deep Learning and Artificial Intelligence‏‎ (09:43, 26 June 2017)
  168. Kinetic Energy Harvesting For Autonomous Smart Watches‏‎ (10:06, 12 July 2017)
  169. Desing and Implementation Of Long Lasting Key Finder With Bleetooth Low Energy‏‎ (10:38, 21 July 2017)
  170. Radio Signal Direction Detection For Smart Glasses For Augmented Reality Applications‏‎ (10:38, 21 July 2017)
  171. Towards The Integration of E-skin into Prosthetic Devices‏‎ (10:39, 21 July 2017)
  172. Using Motion Sensors to Support Indoor Localization‏‎ (10:41, 21 July 2017)
  173. Design of State Retentive Flip-Flops‏‎ (08:34, 25 July 2017)
  174. Passive and Self Sustaining Receivers For On and Intra Body Communication For Wearable Sensors Networks‏‎ (15:58, 28 July 2017)
  175. Low Power Neural Network For Multi Sensors Wearable Devices‏‎ (16:02, 28 July 2017)
  176. Neural Processing‏‎ (14:41, 7 August 2017)
  177. Accelerator for Boosted Binary Features‏‎ (10:51, 19 August 2017)
  178. FPGA acceleration of ultrasound computed tomography for in vivo tumor screening‏‎ (13:07, 30 August 2017)
  179. Control an external ADC using Programmable Real-Time Unit (PRU) Subsystem on Beaglebone Black used as embedded HPC-performance-monitoring device‏‎ (15:15, 1 September 2017)
  180. Glitches Reduce Listening Time of Your iPod‏‎ (14:59, 14 September 2017)
  181. Neural Networks Framwork for Embedded Plattforms‏‎ (15:17, 14 September 2017)
  182. Internet of Things Network Synchronizer‏‎ (19:00, 26 September 2017)
  183. Digital Transmitter for Mobile Communications‏‎ (19:00, 26 September 2017)
  184. FPGA-Based Digital Frontend for 3G Receivers‏‎ (19:01, 26 September 2017)
  185. Baseband Meets CPU‏‎ (19:02, 26 September 2017)
  186. Hardware Accelerated Derivative Pricing‏‎ (08:42, 12 October 2017)
  187. Hardware Accelerator Integration into Embedded Linux‏‎ (08:46, 12 October 2017)
  188. Sandro Belfanti‏‎ (16:27, 1 November 2017)
  189. Harald Kröll‏‎ (16:27, 1 November 2017)
  190. Internet of Things SoC Characterization‏‎ (09:37, 6 November 2017)
  191. VLSI Implementation of a Low-Complexity Channel Shortener for 2G EC-GSM-IoT and Evolved EDGE‏‎ (09:39, 6 November 2017)
  192. WCDMA/HSPA+ Synchronization System Design, Implementation, and Testing‏‎ (09:39, 6 November 2017)
  193. System Analysis and VLSI Design of NB-IoT Baseband Processing‏‎ (09:39, 6 November 2017)
  194. Synchronisation and Cyclic Prefix Handling For LTE Testbed‏‎ (09:40, 6 November 2017)
  195. Reading The GSM Beacon Carrier with OsmocomBB and stoneEDGE‏‎ (09:40, 6 November 2017)
  196. Design and VLSI Implementation of a Constrained-Viterbi Algorithm Equalizer for 3GPP TD-HSPA‏‎ (09:43, 6 November 2017)
  197. Time and Frequency Synchronization in LTE Cat-0 Devices‏‎ (09:43, 6 November 2017)
  198. Sub Noise Floor Channel Estimation for the Cellular Internet of Things‏‎ (10:27, 6 November 2017)
  199. Stefan Lippuner‏‎ (08:51, 7 November 2017)
  200. Low-power chip-to-chip communication network‏‎ (11:34, 7 November 2017)
  201. Frank K. Gürkaynak‏‎ (11:36, 7 November 2017)
  202. Michael Muehlberghuber‏‎ (11:39, 7 November 2017)
  203. PULPonFPGA: Lightweight Virtual Memory Support - Page Table Walker‏‎ (16:57, 7 November 2017)
  204. PULPonFPGA: Lightweight Virtual Memory Support - Multi-Level TLB‏‎ (16:57, 7 November 2017)
  205. PULPonFPGA: Lightweight Virtual Memory Support - Coherency Extensions‏‎ (16:57, 7 November 2017)
  206. Hyper Meccano: Acceleration of Hyperdimensional Computing‏‎ (12:58, 9 November 2017)
  207. Digital Beamforming for Ultrasound Imaging‏‎ (10:23, 10 November 2017)
  208. CPS Software-Configurable State-Machine‏‎ (10:24, 10 November 2017)
  209. State-Saving @ NXP‏‎ (10:34, 10 November 2017)
  210. Pascal Hager‏‎ (10:40, 10 November 2017)
  211. Low Power Embedded Systems‏‎ (16:28, 13 November 2017)
  212. StoneEDGE: An EC-GSM-IoT and Evolved EDGE PHY ASIC‏‎ (12:53, 14 November 2017)
  213. Smart Virtual Memory Sharing‏‎ (11:16, 17 November 2017)
  214. Real-Time Implementation of Quantum State Identification using an FPGA‏‎ (08:03, 21 December 2017)
  215. Design of low-offset dynamic comparators‏‎ (16:35, 21 December 2017)
  216. Receiver design for the DigRF 4G high speed serial link‏‎ (16:37, 21 December 2017)
  217. LTE-Advanced RF Front-end Design in 28nm CMOS Technology‏‎ (16:38, 21 December 2017)
  218. Successive Approximation Register (SAR) ADC‏‎ (16:43, 21 December 2017)
  219. Analog Layout Engine‏‎ (16:44, 21 December 2017)
  220. Mattia‏‎ (17:47, 21 December 2017)
  221. Low Power Geolocalization And Indoor Localization‏‎ (12:36, 11 January 2018)
  222. BigPULP: Multicluster Synchronization Extensions‏‎ (11:17, 22 January 2018)
  223. Resilient Brain-Inspired Hyperdimensional Computing Architectures‏‎ (14:03, 29 January 2018)
  224. High Speed FPGA Trigger Logic for Particle Physics Experiments‏‎ (20:42, 30 January 2018)
  225. Autonomous Sensors For Underwater Monitoring In Smart Navy Systems‏‎ (16:21, 31 January 2018)
  226. Smart Wearable System For Vital Sign Monitoring Exploiting On Board and Cloud Machine Learning‏‎ (16:21, 31 January 2018)
  227. A Wearable System To Control Phone And Electronic Device Without Hands‏‎ (16:22, 31 January 2018)
  228. Low Power One bit Microphone for Acoustic Imaging Using A Parallel Processor‏‎ (10:40, 2 February 2018)
  229. Wake Up Radio For Energy Efficient Communication System and IC Design‏‎ (10:54, 2 February 2018)
  230. Zero Power Touch Sensor and Reciever For Body Communication‏‎ (10:58, 2 February 2018)
  231. Monocular Vision-based Object Following on Nano-size Robotic Blimp‏‎ (15:14, 20 February 2018)
  232. Covariant Feature Detector on Parallel Ultra Low Power Architecture‏‎ (15:16, 20 February 2018)
  233. Towards Self-Sustainable Unmanned Aerial Vehicles‏‎ (15:17, 20 February 2018)
  234. Study and Development of Intelligent Capability for Small-Size UAVs‏‎ (15:18, 20 February 2018)
  235. Towards Autonomous Navigation for Nano-Blimps‏‎ (15:20, 20 February 2018)
  236. Self-Learning Drones based on Neural Networks‏‎ (15:26, 20 February 2018)
  237. A Waypoint-based Navigation System for Nano-Size UAVs in GPS-denied Environments‏‎ (15:35, 20 February 2018)
  238. Design and Implementation of an Approximate Floating Point Unit‏‎ (09:58, 21 February 2018)
  239. Fabian Schuiki‏‎ (10:02, 21 February 2018)
  240. Biomedical Systems on Chip‏‎ (18:55, 22 February 2018)
  241. PULP-Shield for Autonomous UAV‏‎ (10:06, 23 February 2018)
  242. Signal-Processing and Data-Compression on Beaglebone Black used as embedded HPC-performance-monitoring device‏‎ (15:19, 27 February 2018)
  243. Linux Driver for built-in ADC using DMA and Programmable Real-Time Unit (PRU) support on Beaglebone Black used as embedded HPC-performance-monitoring device‏‎ (15:19, 27 February 2018)
  244. A Wireless Sensor Network for HPC monitoring‏‎ (15:22, 27 February 2018)
  245. Interference Cancellation for EC-GSM-IoT‏‎ (18:52, 21 March 2018)
  246. Hyperdimensional Computing‏‎ (09:46, 25 April 2018)
  247. Charging System for Implantable Electronics‏‎ (12:05, 27 April 2018)
  248. Completed‏‎ (12:52, 27 April 2018)
  249. GUI-developement for an action-cam-based eye tracking device‏‎ (10:10, 3 May 2018)
  250. Switched Capacitor Based Bandgap-Reference‏‎ (10:13, 3 May 2018)
  251. Efficient NB-IoT Uplink Design‏‎ (15:58, 7 May 2018)
  252. LTE IoT Network Synchronization‏‎ (15:32, 18 May 2018)
  253. Sub-Noise Floor Channel Tracking‏‎ (15:33, 18 May 2018)
  254. Enabling Standalone Operation‏‎ (13:41, 23 May 2018)
  255. Optimal System Duty Cycling for a Mobile Health Platform‏‎ (13:42, 23 May 2018)
  256. Optimal System Duty Cycling‏‎ (13:44, 23 May 2018)
  257. Enabling Standalone Operation for a Mobile Health Platform‏‎ (14:50, 23 May 2018)
  258. Standard Cell Compatible Memory Array Design‏‎ (14:54, 23 May 2018)
  259. Implementation of a NB-IoT Positioning System‏‎ (15:36, 23 May 2018)
  260. Low Power Embedded Systems and Wireless Sensors Networks‏‎ (11:53, 12 June 2018)
  261. Embedded Artificial Intelligence:Systems And Applications‏‎ (12:52, 12 June 2018)
  262. Physics is looking for PULP‏‎ (15:50, 21 June 2018)
  263. Creating a HDMI Video Interface for PULP‏‎ (08:37, 10 July 2018)
  264. A Wireless Sensor Network for a Smart Building Monitor and Control‏‎ (20:42, 30 July 2018)
  265. Autonomous Sensing For Trains In The IoT Era‏‎ (20:44, 30 July 2018)
  266. LightProbe - Implementation of compressed-sensing algorithms‏‎ (11:13, 1 August 2018)
  267. Ultrafast Medical Ultrasound imaging on a GPU‏‎ (11:13, 1 August 2018)
  268. Intelligent Power Management Unit (iPMU)‏‎ (11:14, 1 August 2018)
  269. Birds Long Term Monitoring With Ultra Low Power Wireless Sensor Node‏‎ (09:14, 3 August 2018)
  270. Students' Interanational Competitions: F1(AMZ), Swissloop, Educational Rockets‏‎ (09:55, 3 August 2018)
  271. Students' International Competitions: F1(AMZ), Swissloop, Educational Rockets‏‎ (10:50, 3 August 2018)
  272. Fast and Accurate Multiclass Inference for Brain–Computer Interfaces‏‎ (16:53, 7 August 2018)
  273. FPGA Optimizations of Dense Binary Hyperdimensional Computing‏‎ (09:11, 8 August 2018)
  274. Sensor Fusion for Rockfall Sensor Node‏‎ (10:51, 21 August 2018)
  275. Development of a Rockfall Sensor Node‏‎ (10:55, 21 August 2018)
  276. BigPULP: Shared Virtual Memory Multicluster Extensions‏‎ (14:05, 23 August 2018)
  277. Cryptography‏‎ (20:04, 24 August 2018)
  278. IoT Turbo Decoder‏‎ (08:37, 14 September 2018)
  279. Shared Correlation Accelerator for an RF SoC‏‎ (08:38, 14 September 2018)
  280. Engineering For Kids‏‎ (15:11, 18 September 2018)
  281. Andreas Kurth‏‎ (21:47, 7 October 2018)
  282. Turbo Equalization for Cellular IoT‏‎ (10:43, 13 November 2018)
  283. PREM on PULP‏‎ (17:20, 20 November 2018)
  284. Taimir Aguacil‏‎ (15:24, 23 November 2018)
  285. High-Throughput Channel Coding & Decoding for V2X Communications‏‎ (18:05, 23 November 2018)
  286. High-Speed Channel Estimation & Tracking for V2X Communications‏‎ (18:06, 23 November 2018)
  287. Digital Front End Design & Frequency Offset Estimation for V2X Communications‏‎ (18:28, 23 November 2018)
  288. Machine Learning-based Compressive Sensing Vehicle Location Tracking ASIC Design‏‎ (19:20, 23 November 2018)
  289. Data Interface: SPI to PC Bridge for ASICs‏‎ (15:20, 4 December 2018)
  290. Ultra-low power transceiver for implantable devices‏‎ (17:01, 4 December 2018)
  291. Inductive Charging Circuit for Implantable Devices‏‎ (17:03, 4 December 2018)
  292. 5G Cellular RF Front-end Design in 28nm CMOS Technology‏‎ (17:05, 4 December 2018)
  293. Design of Charge-Pump PLL in 28nm for 5G communication applications‏‎ (17:06, 4 December 2018)
  294. High Performance Digitally-Assisted Time Domain ADC Design for DPLL used in Cellular IOT‏‎ (17:07, 4 December 2018)
  295. High Power Efficient Digitally Controlled Oscillator Design for Cellular IOT‏‎ (17:07, 4 December 2018)
  296. Android Software Design‏‎ (17:08, 4 December 2018)
  297. Analog IC Design‏‎ (17:10, 4 December 2018)
  298. High performance continuous-time Delta-Sigma ADC for magnetic resonance imaging‏‎ (17:13, 4 December 2018)
  299. Brunn test‏‎ (11:02, 5 December 2018)
  300. Heart Rate Detection Algorithm‏‎ (12:54, 5 December 2018)
  301. Karim Badawi‏‎ (14:06, 5 December 2018)
  302. Low-Energy Cluster-Coupled Vector Coprocessor for Special-Purpose PULP Acceleration‏‎ (14:50, 7 December 2018)
  303. Trace Debugger for custom RISC-V Core‏‎ (10:27, 11 December 2018)
  304. BLISS - Battery-Less Identification System for Security‏‎ (08:59, 16 January 2019)
  305. Digital Audio Interface for Smart Intensive Computing Triggering‏‎ (16:27, 22 January 2019)
  306. Scalable Heterogeneous L1 Memory Interconnect for Smart Accelerator Coupling in Ultra-Low Power Multicores‏‎ (20:21, 29 January 2019)
  307. Moritz Schneider‏‎ (15:36, 30 January 2019)
  308. LightProbe - WIFI extension (PCB)‏‎ (12:42, 14 February 2019)
  309. Pulse Oximetry Fachpraktikum‏‎ (14:59, 18 February 2019)
  310. Level Crossing ADC For a Many Channels Neural Recording Interface‏‎ (09:53, 19 February 2019)
  311. Elliptic Curve Accelerator for zkSNARKs‏‎ (14:02, 4 March 2019)
  312. High-Performance & V2X Cellular Communications‏‎ (13:54, 12 March 2019)
  313. Beat Cadence‏‎ (10:01, 18 March 2019)
  314. Deep Learning for Brain-Computer Interface‏‎ (19:22, 1 April 2019)
  315. Switched-capacitor power amplifier for IoT mobile communications: design of signal processing path‏‎ (14:55, 6 May 2019)
  316. Ultra-low power sampling front-end for acquisition of physiological signals‏‎ (15:06, 6 May 2019)
  317. CMOS power amplifier for field measurements in MRI systems‏‎ (15:06, 6 May 2019)
  318. Analysis and Design of Power Efficient RF/ mm-Wave LC-tank Oscillator in 28nm for 5G communication applications‏‎ (15:07, 6 May 2019)
  319. Exploring Bio Impedance‏‎ (15:13, 6 May 2019)
  320. Design of a 25 Gbps SerDes for optical chip-to-chip communication‏‎ (09:47, 7 May 2019)
  321. Design and implementation of the front-end for a portable ionizing radiation detector‏‎ (11:23, 9 May 2019)
  322. Experimental Validation of Impact Ionization Models for TCAD Simulation by a Novel Characterization Technique‏‎ (09:30, 5 June 2019)
  323. Design and Exploitation of a Test-Bench for Non-Destructive Characterization of the Susceptibility of Silicon Carbide (SiC) Power Devices to Cosmic Radiation‏‎ (15:31, 5 June 2019)
  324. Implementation of the RISC-V Bit Manipulation (RVB) extensions for our RI5CY core‏‎ (09:02, 14 June 2019)
  325. Freedom from Interference in Heterogeneous COTS SoCs‏‎ (16:40, 19 June 2019)
  326. Predictable Execution on GPU Caches‏‎ (16:41, 19 June 2019)
  327. PREM Intervals and Loop Tiling‏‎ (17:00, 19 June 2019)
  328. Compiler Profiling and Optimizing‏‎ (17:20, 19 June 2019)
  329. Extending the RISCV backend of LLVM to support PULP Extensions‏‎ (17:27, 19 June 2019)
  330. NAND Flash Open Research Platform‏‎ (10:06, 11 July 2019)
  331. Minimal Cost RISC-V core‏‎ (16:24, 21 August 2019)
  332. A Demonstrator of Non-Synchronized Hyperdimensional Body Area Networks‏‎ (15:42, 27 August 2019)
  333. Ab-initio modeling of ballistic thermal transport‏‎ (17:02, 3 September 2019)
  334. Development of an efficient algorithm for quantum transport codes‏‎ (17:16, 3 September 2019)
  335. Influence of the Initial FilamentGeometry on the Forming Step in CBRAM‏‎ (17:39, 3 September 2019)
  336. Investigation of Redox Processes in CBRAM‏‎ (17:50, 3 September 2019)
  337. Electrical characterization and optimization of electrochemical random-access memory for analog computing‏‎ (18:19, 3 September 2019)
  338. Quantum transport in 2D heterostructures‏‎ (11:51, 4 September 2019)
  339. Using piezoelectricity in monolayer 2D materials to build future nanoscale devices‏‎ (11:51, 4 September 2019)
  340. Source contact engineering in 2D materials MOSFET to achieve sub-60 mV/decade transistors‏‎ (11:52, 4 September 2019)
  341. Finite element modeling of electrochemical random access memory‏‎ (11:52, 4 September 2019)
  342. Influence of the Initial Filament Geometry on the Forming Step in CBRAM.‏‎ (11:53, 4 September 2019)
  343. Nanoscale Hybrid III-V Plasmonic Laser for Low-Power Photonic ICs‏‎ (11:53, 4 September 2019)
  344. Design space exploration of InP Heterojunction Bipolar Transistors (DHBTs)‏‎ (11:54, 4 September 2019)
  345. Influence of the Initial Filament Geometry on the Forming Step in CBRAM‏‎ (14:34, 4 September 2019)
  346. Simulation of Negative Capacitance Ferroelectric Transistor‏‎ (14:37, 4 September 2019)
  347. Computation of Phonon Bandstructure in III-V Nanostructures‏‎ (14:37, 4 September 2019)
  348. Design study of tunneling transistors based on a core/shell nanowire structures‏‎ (14:38, 4 September 2019)
  349. Investigation of the source starvation effect in III-V MOSFET‏‎ (14:40, 4 September 2019)
  350. Implementation of a 2-D model for Li-ion batteries‏‎ (14:41, 4 September 2019)
  351. Optical Weights for Photonic Neural Networks‏‎ (14:42, 4 September 2019)
  352. Ab-initio Simulation of Strained Thermoelectric Materials‏‎ (14:43, 4 September 2019)
  353. Simulation of Li-ion batteries and comparison with experimental data‏‎ (14:43, 4 September 2019)
  354. Full-band simulations of InP/GaAsSb/InP Double Heterojunction Bipolar Transistors (DHBTs)‏‎ (14:44, 4 September 2019)
  355. Investigation of Metal Diffusion in Oxides for CBRAM Applications‏‎ (16:11, 4 September 2019)
  356. Interfacing PULP with a Brain-Inspired Ultra-Low Power Spiking Cochlea‏‎ (17:36, 5 September 2019)
  357. Design of Scalable Event-driven Neural-Recording Digital Interface‏‎ (17:40, 5 September 2019)
  358. Near-Memory Training of Neural Networks‏‎ (08:17, 11 September 2019)
  359. Design and Implementation of a multi-mode multi-master I2C peripheral‏‎ (18:38, 13 September 2019)
  360. Neural Network Algorithms and Interfaces with Accelerators for Embedded Platforms with Real World Applications‏‎ (16:29, 16 September 2019)
  361. Application Specific Frequency Synthesizers (Analog/Digital PLLs)‏‎ (13:52, 25 September 2019)
  362. Design of key building blocks for miniaturized sensor systems‏‎ (13:53, 25 September 2019)
  363. Energy Efficient Circuits for Wireless Neural Recording‏‎ (13:54, 25 September 2019)
  364. EECIS‏‎ (14:18, 25 September 2019)
  365. Deep-Learning Based Phoneme Recognition from a Ultra-Low Power Spiking Cochlea‏‎ (15:33, 3 October 2019)
  366. AnalogInt‏‎ (19:25, 25 October 2019)
  367. Cell Measurements for the 5G Internet of Things‏‎ (10:55, 29 October 2019)
  368. Herschmi‏‎ (14:03, 29 October 2019)
  369. Improving Resiliency of Hyperdimensional Computing‏‎ (14:51, 29 October 2019)
  370. Toward Superposition of Brain-Computer Interface Models‏‎ (14:52, 29 October 2019)
  371. Positioning for the cellular Internet of Things‏‎ (12:14, 31 October 2019)
  372. Interference Cancellation for the cellular Internet of Things‏‎ (12:15, 31 October 2019)
  373. Indoor Positioning with Bluetooth‏‎ (11:12, 4 November 2019)
  374. Design of an LTE Module for the Internet of Things‏‎ (13:20, 4 November 2019)
  375. Design of a VLIW processor architecture based on RISC-V‏‎ (09:25, 5 November 2019)
  376. Design of a Fused Multiply Add Floating Point Unit‏‎ (09:26, 5 November 2019)
  377. Audio Video Preprocessing In Parallel Ultra Low Power Platform‏‎ (09:27, 5 November 2019)
  378. PULPonFPGA: Hardware L2 Cache‏‎ (09:27, 5 November 2019)
  379. Image and Video Processing‏‎ (09:29, 5 November 2019)
  380. DMA Streaming Co-processor‏‎ (09:30, 5 November 2019)
  381. Developing a small portable neutron detector for detecting smuggled nuclear material‏‎ (09:32, 5 November 2019)
  382. Accelerators for object detection and tracking‏‎ (09:57, 5 November 2019)
  383. Design of an on-field adaptable pulse-processing unit for semicondutor radiation detectors‏‎ (17:26, 5 November 2019)
  384. Characterization of the susceptibility to cosmic radiation of wide bandgap power devices by radioactive sources and at cryogenic temperatures‏‎ (17:33, 5 November 2019)
  385. Ternary Weights Engine For Efficient Many Channels Spike Sorting Applications‏‎ (09:05, 18 November 2019)
  386. HERO: TLB Invalidation‏‎ (16:19, 18 November 2019)
  387. FPGA Testbed Implementation for Bluetooth Indoor Positioning‏‎ (20:47, 18 November 2019)
  388. PULPonFPGA: Lightweight Virtual Memory Support - Software Cache‏‎ (12:43, 29 November 2019)
  389. PULPonFPGA: Lightweight Virtual Memory Support - Physically Contiguous Memory‏‎ (12:43, 29 November 2019)
  390. Exploring Algorithms for Early Seizure Detection‏‎ (17:47, 6 January 2020)
  391. Toward hyperdimensional active perception: learning compressed sensorimotor control by demonstration‏‎ (19:12, 9 February 2020)
  392. Pirmin Vogel‏‎ (14:39, 3 March 2020)
  393. Real-Time ECG Contractions Classification‏‎ (18:15, 9 March 2020)
  394. Real-Time Embedded Classification of Neural Activity in Rat Barrel Cortex‏‎ (18:20, 9 March 2020)
  395. Final Presentation‏‎ (17:53, 22 March 2020)
  396. A computational memory unit using phase-change memory devices‏‎ (10:33, 17 April 2020)
  397. Accurate deep learning inference using computational memory‏‎ (11:51, 17 April 2020)
  398. MmWave PLL: 100GHz PLL using reference oversampling scheme‏‎ (18:05, 7 May 2020)
  399. Palm size chip NMR‏‎ (18:29, 7 May 2020)
  400. Palm size chip NMR probe‏‎ (18:37, 7 May 2020)
  401. Energy Efficient Circuits and IoT Systems Group‏‎ (18:39, 7 May 2020)
  402. Benjamin Weber‏‎ (12:40, 8 May 2020)
  403. Timing Channel Mitigations for RISC-V Cores‏‎ (17:16, 20 May 2020)
  404. Nanoelectrode array biosensors - programmable non-overlapping clocks generator project‏‎ (06:56, 26 May 2020)
  405. Circuits and Systems for Nanoelectrode Array Biosensors‏‎ (12:27, 26 May 2020)
  406. Deep neural networks for seizure detection‏‎ (14:51, 22 June 2020)
  407. BCI-controlled Drone‏‎ (15:15, 22 June 2020)
  408. Contrastive Learning for Self-supervised Clustering of iEEG Data for Epileptic Patients‏‎ (15:19, 22 June 2020)
  409. Data Augmentation Techniques in Biosignal Classification‏‎ (15:45, 22 June 2020)
  410. Compression of iEEG Data‏‎ (15:58, 22 June 2020)
  411. Classification of Evoked Local-Field Potentials in Rat Barrel Cortex using Hyper-dimensional Computing‏‎ (16:30, 22 June 2020)
  412. Energy Efficient Autonomous UAVs‏‎ (10:14, 24 June 2020)
  413. Improved State Estimation on PULP-based Nano-UAVs‏‎ (11:55, 24 June 2020)
  414. RISC-V based Implementation of Secure Ranging According to IEEE 802.15.4z UWB‏‎ (12:09, 29 June 2020)
  415. An Energy Efficient Brain-Computer Interface using Mr.Wolf‏‎ (10:09, 21 July 2020)
  416. TCNs vs. LSTMs for Embedded Platforms‏‎ (10:10, 21 July 2020)
  417. Subject specific embeddings for transfer learning in brain-computer interfaces‏‎ (10:12, 21 July 2020)
  418. Towards global Brain-Computer Interfaces‏‎ (10:19, 21 July 2020)
  419. Exploring features and algorithms for ultra-low-power closed-loop systems for epilepsy control‏‎ (10:22, 21 July 2020)
  420. Combining Spiking Neural Networks with Hyperdimensional Computing for Autonomous Navigation‏‎ (16:56, 21 July 2020)
  421. A Snitch-based Compute Accelerator for HERO‏‎ (13:58, 29 July 2020)
  422. Tbenz‏‎ (15:48, 29 July 2020)
  423. Stefan Mach‏‎ (16:06, 29 July 2020)
  424. Floating-Point Divide & Square Root Unit for Transprecision‏‎ (16:09, 29 July 2020)
  425. Spiking Neural Network for Autonomous Navigation‏‎ (08:11, 5 August 2020)
  426. Event-Driven Convolutional Neural Network Modular Accelerator‏‎ (08:38, 5 August 2020)
  427. IBM Research–Zurich‏‎ (16:40, 10 August 2020)
  428. Advanced 5G Repetition Combining‏‎ (14:50, 17 August 2020)
  429. Template‏‎ (14:08, 19 August 2020)
  430. Theory, Algorithms, and Hardware for Beyond 5G‏‎ (14:27, 19 August 2020)
  431. Fluffy bunny project‏‎ (15:01, 19 August 2020)
  432. Battery Tester‏‎ (15:11, 25 August 2020)
  433. Livestream GUI via USB‏‎ (15:11, 25 August 2020)
  434. Ibex: Bit-Manipulation Extension‏‎ (08:45, 28 August 2020)
  435. Ibex: FPGA Optimizations‏‎ (08:45, 28 August 2020)
  436. Deep Convolutional Autoencoder for iEEG Signals‏‎ (12:36, 9 September 2020)
  437. PULP‏‎ (09:38, 11 September 2020)
  438. Hyper-Dimensional Computing Based Predictive Maintenance‏‎ (13:27, 14 September 2020)
  439. Implementation of the RISC-V Bit Manipulation (RVB) extensions for our RISC-V core‏‎ (14:15, 15 September 2020)
  440. Real-Time Motor-Imagery Classification Using Neuromorphic Processor‏‎ (15:25, 15 September 2020)
  441. SmartRing‏‎ (15:26, 15 September 2020)
  442. Stand-Alone Edge Computing with GAP8‏‎ (08:04, 24 September 2020)
  443. Positioning with Wireless Signals‏‎ (09:24, 28 September 2020)
  444. Heterogeneous SoCs‏‎ (17:41, 28 October 2020)
  445. Signal Acquisition and Clock Offset Compensation for High-Rate Pulse UWB PHYs‏‎ (11:09, 29 October 2020)
  446. Peak-to-average power Reduction‏‎ (11:21, 29 October 2020)
  447. Ara: Update PULP's Vector Processor with the recent RISC-V Vector Extension Development‏‎ (13:42, 29 October 2020)
  448. Channel Estimation for 5G Cellular IoT and Fast Fading Channels‏‎ (17:54, 29 October 2020)
  449. Analog‏‎ (13:29, 30 October 2020)
  450. Power Optimization in Multipliers‏‎ (15:23, 30 October 2020)
  451. Evaluating the RiscV Architecture‏‎ (15:24, 30 October 2020)
  452. Energy Neutral Multi Sensors Wearable Device‏‎ (15:24, 30 October 2020)
  453. Bringing XNOR-nets (ConvNets) to Silicon‏‎ (15:25, 30 October 2020)
  454. Learning Image Compression with Convolutional Networks‏‎ (15:25, 30 October 2020)
  455. Improving our Smart Camera System‏‎ (15:26, 30 October 2020)
  456. AMZ Driverless Competition Embedded Systems Projects‏‎ (15:27, 30 October 2020)
  457. Nils Wistoff‏‎ (17:59, 30 October 2020)
  458. LightProbe‏‎ (13:14, 31 October 2020)
  459. Acceleration and Transprecision‏‎ (00:20, 1 November 2020)
  460. IBM A2O Core‏‎ (10:15, 2 November 2020)
  461. PREM Runtime Scheduling Policies‏‎ (10:47, 2 November 2020)
  462. (M): A Flexible Peripheral System for High-Performance Systems on Chip‏‎ (11:16, 2 November 2020)
  463. A Flexible Peripheral System for High-Performance Systems on Chip (M)‏‎ (11:17, 2 November 2020)
  464. A Snitch-based Compute Accelerator for HERO (M/1-2S)‏‎ (11:18, 2 November 2020)
  465. PULP in space - Fault Tolerant PULP System for Critical Space Applications‏‎ (11:19, 2 November 2020)
  466. Implementation of a Heterogeneous System for Image Processing on an FPGA‏‎ (11:48, 2 November 2020)
  467. Coherence-Capable Write-Back L1 Data Cache for Ariane (M)‏‎ (11:55, 2 November 2020)
  468. SSR combined with FREP in LLVM/Clang‏‎ (12:02, 2 November 2020)
  469. DaCe on Snitch‏‎ (12:03, 2 November 2020)
  470. Implementation of a Heterogeneous System for Image Processing on an FPGA (S)‏‎ (16:26, 2 November 2020)
  471. Biomedical System on Chips‏‎ (16:34, 2 November 2020)
  472. Physical Implementation of MemPool, PULP's Manycore System (1M/1-2S)‏‎ (17:24, 2 November 2020)
  473. MemPool on HERO‏‎ (17:42, 2 November 2020)
  474. Matteo Perotti‏‎ (18:02, 2 November 2020)
  475. MemPool on HERO (1S)‏‎ (18:21, 2 November 2020)
  476. ISA extensions in the Snitch Processor for Signal Processing (1M)‏‎ (18:24, 2 November 2020)
  477. ISA extensions in the Snitch Processor for Signal Processing (M)‏‎ (18:31, 2 November 2020)
  478. SystemVerilog formatter for our LowRISC-based guidelines (2-3G)‏‎ (18:35, 2 November 2020)
  479. Event-Driven Computing‏‎ (10:16, 5 November 2020)
  480. Knowledge Distillation for Embedded Machine Learning‏‎ (10:19, 5 November 2020)
  481. Efficient TNN compression‏‎ (10:34, 5 November 2020)
  482. All-Digital In-Memory Processing‏‎ (11:23, 5 November 2020)
  483. Semi-Custom Digital VLSI for Processing-in-Memory‏‎ (16:18, 5 November 2020)
  484. Practical Reconfigurable Intelligent Surfaces (RIS)‏‎ (18:10, 5 November 2020)
  485. Cell-Free mmWave Massive MIMO Communication‏‎ (18:11, 5 November 2020)
  486. Self-Supervised User Positioning in Cell-Free Massive MIMO Systems‏‎ (18:11, 5 November 2020)
  487. Visualizing Functional Microbubbles using Ultrasound Imaging‏‎ (11:59, 10 November 2020)
  488. LightProbe - 200G Remote DMA for GPU FPGA Data Transfers‏‎ (12:00, 10 November 2020)
  489. A Recurrent Neural Network Speech Recognition Chip‏‎ (12:38, 10 November 2020)
  490. Energy-Efficient Brain-Inspired Hyperdimensional Computing‏‎ (12:38, 10 November 2020)
  491. Hardware Accelerators for Lossless Quantized Deep Neural Networks‏‎ (12:41, 10 November 2020)
  492. NVDLA meets PULP‏‎ (12:42, 10 November 2020)
  493. An Industrial-grade Bluetooth LE Mesh Network Solution‏‎ (14:34, 10 November 2020)
  494. Contextual Intelligence on Resource-constraint Bluetooth LE IoT Devices‏‎ (14:36, 10 November 2020)
  495. Embedded Gesture Recognition Using Novel Mini Radar Sensors‏‎ (14:36, 10 November 2020)
  496. A Wearable Wireless Kidney Function Monitoring System For BioMedical Applications‏‎ (14:37, 10 November 2020)
  497. Indoor Smart Tracking of Hospital instrumentation‏‎ (14:37, 10 November 2020)
  498. Wireless Sensing With Long Range Comminication (LoRa)‏‎ (14:37, 10 November 2020)
  499. Optogenetics And Game Theory Applied To Small Side Bird Using Smart Sensing‏‎ (14:38, 10 November 2020)
  500. Edge Computing for Long-Term Wearable Biomedical Systems‏‎ (14:38, 10 November 2020)

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