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  1. Test project‏‎ (2 revisions)
  2. Triple-Core PULPissimo‏‎ (2 revisions)
  3. Successive Interference Cancellation for 3G Downlink‏‎ (2 revisions)
  4. Deep Unfolding of Iterative Optimization Algorithms‏‎ (2 revisions)
  5. On-Device Training Sparse Sub-Tensor Update Scheme Optimization for CNN-based tasks‏‎ (2 revisions)
  6. BirdGuard‏‎ (2 revisions)
  7. Mixed Signal IC Design‏‎ (2 revisions)
  8. System on Chips for IoTs‏‎ (2 revisions - redirect page)
  9. A Post-Simulation Trace-Based RISC-V GDB Debugging Server‏‎ (2 revisions)
  10. Optimal System Duty Cycling‏‎ (2 revisions)
  11. Accelerators for object detection and tracking‏‎ (2 revisions)
  12. Quantum Transport Modeling of Interband Cascade Lasers (ICL)‏‎ (2 revisions)
  13. Data Mapping for Unreliable Memories‏‎ (2 revisions)
  14. High-Resolution, Calibrated Folding ADCs‏‎ (2 revisions)
  15. PREM Intervals and Loop Tiling‏‎ (2 revisions)
  16. Improving SystemVerilog Support for Free And Open-Source EDA Tools (1-3S/B)‏‎ (2 revisions)
  17. Kinetic Energy Harvesting For Autonomous Smart Watches‏‎ (2 revisions)
  18. Benchmarking a heterogeneous 217-core MPSoC on HPC applications (M/1-3S))‏‎ (2 revisions)
  19. Near-Optimal Reduced-Complexity Sequence Detectors for TD-HSPA‏‎ (2 revisions)
  20. Design of a Reconfigurable Vector Processor Cluster for Area Efficient Radar Processing (1M)‏‎ (2 revisions)
  21. An Efficient Compiler Backend for Snitch (1S/B)‏‎ (2 revisions)
  22. Autonomous Smart Sensors for IoT‏‎ (2 revisions - redirect page)
  23. Low Precision Ara for ML‏‎ (2 revisions)
  24. Christoph Leitner‏‎ (2 revisions)
  25. Accurate deep learning inference using computational memory‏‎ (2 revisions)
  26. Exploitation of Inherent Error Resilience of Wireless Systems under Unreliable Silicon‏‎ (2 revisions)
  27. Development Of A Test Bed For Ultrasonic Transducer Characterization‏‎ (2 revisions - redirect page)
  28. RazorEDGE‏‎ (2 revisions - redirect page)
  29. Audio Visual Speech Recognition (1S/1M)‏‎ (2 revisions)
  30. Enhancing Our DMA Engine With Virtual Memory (M/1-3S/B)‏‎ (2 revisions)
  31. Convolution Neural Networks on our Ultra-Low Power Mult-Core Plattform PULP‏‎ (2 revisions)
  32. Network-off-Chip (M)‏‎ (2 revisions)
  33. Towards Flexible and Printable Wearables‏‎ (2 revisions)
  34. AXI-based Network on Chip (NoC) system‏‎ (2 revisions)
  35. Design of a Scalable High-Performance and Low-Power Interface Based on the I3C Protocol (1-3S/B)‏‎ (2 revisions)
  36. Wake Up Radio For Energy Efficient Communication System and IC Design‏‎ (2 revisions)
  37. Research‏‎ (2 revisions)
  38. Evaluating memory access pattern specializations in OoO, server-grade cores (M)‏‎ (2 revisions)
  39. Short Range Radars For Biomedical Application‏‎ (2 revisions)
  40. Low Resolution Neural Networks‏‎ (2 revisions)
  41. Design of low mismatch DAC used for VAD‏‎ (2 revisions)
  42. Skin Coupling Media Characterization For Fitness Tracker Applications (1 B/S)‏‎ (2 revisions)
  43. Norbert Felber‏‎ (2 revisions)
  44. Network-on-Chip for coherent and non-coherent traffic (M)‏‎ (2 revisions)
  45. Design Of A Biomarker Assay Based On Responsive Magnetic Nanoparticles‏‎ (2 revisions)
  46. A Demonstrator of Non-Synchronized Hyperdimensional Body Area Networks‏‎ (2 revisions)
  47. On - Device Continual Learning for Seizure Detection on GAP9‏‎ (2 revisions)
  48. Ultrasound‏‎ (2 revisions)
  49. Ab-initio Simulation of Strained Thermoelectric Materials‏‎ (2 revisions)
  50. Modeling High Bandwidth Memory for Rapid Design Space Exploration (1-3S/B)‏‎ (2 revisions)
  51. Flexible Front-End Circuit for Biomedical Data Acquisition‏‎ (2 revisions)
  52. Using Motion Sensors to Support Indoor Localization‏‎ (2 revisions)
  53. Adaptively Controlled Hysteresis Curve Tracer For Polymer Piezoelectrics (1 S/B)‏‎ (2 revisions - redirect page)
  54. Development Of An FPGA-Based Optoacoustic Image Reconstruction Platform for Clinical Applications‏‎ (2 revisions)
  55. Power Saver Mode for Cellular Internet of Things Receivers‏‎ (2 revisions)
  56. Securing Block Ciphers against SCA and SIFA‏‎ (2 revisions)
  57. Neural Architecture Search using Reinforcement Learning and Search Space Reduction‏‎ (2 revisions)
  58. Design Review‏‎ (2 revisions)
  59. High Throughput Turbo Decoder Design‏‎ (2 revisions)
  60. Design of a Scalable High-Performance and Low-Power Interface Based on the I3C Protocol (B/1-3S)‏‎ (2 revisions)
  61. Weak-strong massive MIMO communication with low-resolution ADCs‏‎ (2 revisions)
  62. Autonomus Drones With Novel Sensors And Ultra Wide Band‏‎ (2 revisions)
  63. LightProbe - 192cha Multiplexer Stage (Rigid-Flex-PCB Project)‏‎ (2 revisions)
  64. Signal Acquisition and Clock Offset Compensation for High-Rate Pulse UWB PHYs‏‎ (2 revisions)
  65. Coding Guidelines‏‎ (2 revisions)
  66. Cryptography‏‎ (2 revisions)
  67. Hardware Support for IDE in Multicore Environment‏‎ (2 revisions)
  68. Design study of tunneling transistors based on a core/shell nanowire structures‏‎ (2 revisions)
  69. Analog Layout Engine‏‎ (2 revisions)
  70. Design of a CAN Interface to Enable Reliable Sensors-to-Processors Communication for Automotive-oriented Embedded Applications (1M)‏‎ (2 revisions)
  71. Towards Self-Sustainable Unmanned Aerial Vehicles‏‎ (2 revisions)
  72. Wearable Smart Camera With Deep Learning Algorithms For Automatic Detecion‏‎ (2 revisions)
  73. Wireless Sensing With Long Range Comminication (LoRa)‏‎ (2 revisions)
  74. RISC-V base ISA for ultra-low-area cores (2-3G)‏‎ (2 revisions)
  75. SSR combined with FREP in LLVM/Clang‏‎ (2 revisions)
  76. Computation of Phonon Bandstructure in III-V Nanostructures‏‎ (2 revisions)
  77. Time Synchronization for 3G Mobile Communications‏‎ (2 revisions)
  78. PULP Freertos with LLVM‏‎ (2 revisions)
  79. Alias-Free Oscillator Synchronization for Arbitrary Waveforms‏‎ (2 revisions)
  80. Prasadar‏‎ (2 revisions)
  81. Finalizing and Releasing Our Open-source AXI4 IPs (1-3S/B/2-3G)‏‎ (2 revisions)
  82. Neural Networks Framwork for Embedded Plattforms‏‎ (2 revisions)
  83. A Flexible Peripheral System for High-Performance Systems on Chip (M)‏‎ (2 revisions)
  84. Project Meetings‏‎ (2 revisions)
  85. LightProbe - CNN-Based-Image-Reconstruction‏‎ (2 revisions)
  86. Coherence-Capable Write-Back L1 Data Cache for Ariane (M)‏‎ (2 revisions)
  87. Frank K. Gürkaynak‏‎ (2 revisions)
  88. Herschmi‏‎ (2 revisions)
  89. Optogenetics And Game Theory Applied To Small Side Bird Using Smart Sensing‏‎ (2 revisions)
  90. VLSI Implementation Polar Decoder using High Level Synthesis‏‎ (2 revisions)
  91. NORX - an AEAD algorithm for the CAESAR competition‏‎ (2 revisions)
  92. Assessment of novel photovoltaic architectures by circuit simulation‏‎ (2 revisions)
  93. Realtime Gaze Tracking on Siracusa‏‎ (2 revisions)
  94. EvaLTE: A 2G/3G/4G Cellular Transceiver FMC‏‎ (2 revisions)
  95. Creating A Boundry Scan Generator (1-3S/B/2-3G)‏‎ (2 revisions)
  96. Neural Processing‏‎ (2 revisions)
  97. Project Plan‏‎ (2 revisions)
  98. Integrating Hardware Accelerators into Snitch 1S‏‎ (2 revisions - redirect page)
  99. Event-based navigation on autonomous nano-drones‏‎ (2 revisions)
  100. Simulation of Li-ion batteries and comparison with experimental data‏‎ (2 revisions)
  101. Combining Multi Sensor Imaging and Machine Learning for Robust Far-Field Vision‏‎ (2 revisions)
  102. Heterogeneous Acceleration Systems‏‎ (2 revisions - redirect page)
  103. Transformer Deployment on Heterogeneous Many-Core Systems‏‎ (2 revisions)
  104. XNORLAX: Fused XNOR-LATCH Custom-Standard-Cell-Based Processing-in-Memory‏‎ (2 revisions)
  105. Wearables for Sports and Life Enhancement‏‎ (2 revisions)
  106. DaCe on Snitch‏‎ (2 revisions)
  107. A Snitch-based Compute Accelerator for HERO (M/1-2S)‏‎ (2 revisions)
  108. Ottocore: A Minimal RISC-V Core Designed for Teaching (B/2G)‏‎ (2 revisions)
  109. Desing and Implementation Of Long Lasting Key Finder With Bleetooth Low Energy‏‎ (2 revisions)
  110. Improving Cold-Start in Batteryless And Energy Harvesting Systems‏‎ (2 revisions)
  111. Contextual Intelligence on Resource-constraint Bluetooth LE IoT Devices‏‎ (2 revisions)
  112. Reconfigurability of SHA-3 candidates‏‎ (2 revisions)
  113. A Novel Constrained-Viterbi Algorithm with Linear Equalization and Grouping Assistance‏‎ (2 revisions)
  114. High resolution, low power Sigma Delta ADC‏‎ (2 revisions)
  115. Benchmarking a heterogeneous 217-core MPSoC on HPC applications‏‎ (2 revisions)
  116. Smart Patch For Heath Care And Rehabilitation‏‎ (2 revisions)
  117. High Performance Cellular Receivers in Very Advanced CMOS‏‎ (2 revisions)
  118. Implementation of a 2-D model for Li-ion batteries‏‎ (2 revisions)
  119. Ultrasound measurement of microbubble stiffness for in situ detection of protease activity in clinical settings‏‎ (2 revisions)
  120. Running Rust on PULP‏‎ (3 revisions)
  121. Extended Verification for Ara‏‎ (3 revisions)
  122. A mmWave Voltage-Controlled-Oscillator (VCO) for beyond 5G applications‏‎ (3 revisions)
  123. Ambient RF Energy harvesting for Wireless Sensor Network‏‎ (3 revisions)
  124. Infrared Wake Up Radio‏‎ (3 revisions)
  125. RedCap-5G for IOT application on prototype taped-out silicon‏‎ (3 revisions)
  126. Serverless Benchmarks on RISC-V (M)‏‎ (3 revisions)
  127. Neuromorphic Intelligence In An Embedded System in Collaboration with AiCTX‏‎ (3 revisions)
  128. Implementing A Low-Power Sensor Node Network‏‎ (3 revisions)
  129. Multi issue OoO Ariane Backend‏‎ (3 revisions - redirect page)
  130. Turbo Decoder Design for High Code Rates‏‎ (3 revisions)
  131. Developing a small portable neutron detector for detecting smuggled nuclear material‏‎ (3 revisions)
  132. Efficient Banded Matrix Multiplication for Quantum Transport Simulations‏‎ (3 revisions)
  133. Radio Signal Direction Detection For Smart Glasses For Augmented Reality Applications‏‎ (3 revisions)
  134. MemPool on HERO‏‎ (3 revisions)
  135. Integrated Devices, Electronics, And Systems‏‎ (3 revisions)
  136. Reliability by Switching the Embedded ISA in Ibex (1-2S/B/1M)‏‎ (3 revisions)
  137. (M): A Flexible Peripheral System for High-Performance Systems on Chip‏‎ (3 revisions)
  138. Unconventional phase change memory device concepts for in-memory and neuromorphic computin‏‎ (3 revisions)
  139. Improving datarate and efficiency of ultra low power wearable ultrasound‏‎ (3 revisions)
  140. Efficient Execution of Transformers in RISC-V Vector Machines with Custom HW acceleration (M)‏‎ (3 revisions)
  141. Channel Estimation for 5G Cellular IoT and Fast Fading Channels‏‎ (3 revisions)
  142. Enabling Standalone Operation for a Mobile Health Platform‏‎ (3 revisions)
  143. Bluetooth Low Energy network with optimized data throughput‏‎ (3 revisions)
  144. Exploration and Hardware Acceleration of Intra-Layer Mixed-Precision QNNs‏‎ (3 revisions)
  145. Thermal Control of Mobile Devices‏‎ (3 revisions)
  146. Channel Estimation for TD-HSPA‏‎ (3 revisions)
  147. Towards Formal Verification of the iDMA Engine (1-3S/B)‏‎ (3 revisions)
  148. Design of a Scalable High-Performance and Low-Power Interface Based on the I3C Protocol (1M)‏‎ (3 revisions)
  149. Watchdog Timer for PULP‏‎ (3 revisions)
  150. Taping a Safer Silicon Implementation of Snitch (M/2-3S)‏‎ (3 revisions)
  151. 3D Matrix Multiplication Unit for ITA (1S)‏‎ (3 revisions)
  152. NextGenChannelDec‏‎ (3 revisions)
  153. Digitally-Controlled Analog Subtractive Sound Synthesis‏‎ (3 revisions)
  154. Ultra-High-Efficiency Power Supply Management for Ultra-Low-Power Systems on Chip‏‎ (3 revisions)
  155. Implementation of a Heterogeneous System for Image Processing on an FPGA (S)‏‎ (3 revisions)
  156. Standard Cell Compatible Memory Array Design‏‎ (3 revisions)
  157. Glitches Reduce Listening Time of Your iPod‏‎ (3 revisions)
  158. Adversarial Attacks Against Deep Neural Networks In Wearable Cameras‏‎ (3 revisions)
  159. Ara: Update PULP's Vector Processor with the recent RISC-V Vector Extension Development‏‎ (3 revisions)
  160. Low-power time synchronization for IoT applications‏‎ (3 revisions)
  161. Softmax for Transformers (M/1-2S)‏‎ (3 revisions)
  162. Michael Muehlberghuber‏‎ (3 revisions)
  163. Bringing XNOR-nets (ConvNets) to Silicon‏‎ (3 revisions)
  164. Signal to Noise Ratio Estimation for 3G standards‏‎ (3 revisions)
  165. Design and implementation of the front-end for a portable ionizing radiation detector‏‎ (3 revisions)
  166. Training and Deploying Next-Generation Quantized Neural Networks on Microcontrollers‏‎ (3 revisions)
  167. EECIS‏‎ (3 revisions)
  168. Interference Cancellation for Evolved EDGE on the RazorEDGE baseband ASIC‏‎ (3 revisions)
  169. Energy Efficient Smart Devices For Construction Building Maintenance Hilti Collaboration‏‎ (3 revisions)
  170. Study and Development of Intelligent Capability for Small-Size UAVs‏‎ (3 revisions)
  171. Design of a D-Band Variable Gain Amplifier for 6G Communication‏‎ (3 revisions)
  172. Autoencoder Accelerator for On-Chip Semi-Supervised Learning‏‎ (3 revisions)
  173. Software‏‎ (3 revisions)
  174. An Industrial-grade Bluetooth LE Mesh Network Solution‏‎ (3 revisions)
  175. Integrating Hardware Accelerators into Snitch (1S)‏‎ (3 revisions)
  176. Machine Learning Assisted Direct Synthesis of Passive Networks‏‎ (3 revisions)
  177. EEG-based drowsiness detection‏‎ (3 revisions)
  178. Interference Cancellation for the cellular Internet of Things‏‎ (3 revisions)
  179. Investigation of the source starvation effect in III-V MOSFET‏‎ (3 revisions)
  180. Development of a syringe label reader for the neurocritical care unit‏‎ (3 revisions)
  181. Aliasing-Free Wavetable Music Synthesizer‏‎ (3 revisions)
  182. Low Power Embedded Systems‏‎ (3 revisions)
  183. Design of an Energy-Efficient Ethernet Interface for Linux-capable Systems‏‎ (3 revisions)
  184. LightProbe - Design of a High-Speed Optical Link‏‎ (3 revisions)
  185. 3D Ultrasound Bubble Tracking‏‎ (3 revisions)
  186. Efficient TNN Inference on PULP Systems‏‎ (3 revisions)
  187. Autonomous Mapping with Nano-Drones UWB and Novel Depth Sensors‏‎ (3 revisions)
  188. Receiver design for the DigRF 4G high speed serial link‏‎ (3 revisions)
  189. Low Power Embedded Systems and Wireless Sensors Networks‏‎ (3 revisions)
  190. Towards The Integration of E-skin into Prosthetic Devices‏‎ (3 revisions)
  191. Digital Control of a DC/DC Buck Converter‏‎ (3 revisions)
  192. Bandwidth Efficient NEureka‏‎ (3 revisions)
  193. Simulation of Negative Capacitance Ferroelectric Transistor‏‎ (3 revisions)
  194. Combining Spiking Neural Networks with Hyperdimensional Computing for Autonomous Navigation‏‎ (3 revisions)
  195. Full-band simulations of InP/GaAsSb/InP Double Heterojunction Bipolar Transistors (DHBTs)‏‎ (3 revisions)
  196. Design of MEMs Sensor Interface‏‎ (3 revisions)
  197. Matthias Korb‏‎ (3 revisions)
  198. High-throughput Embedded System For Neurotechnology in collaboration with INI‏‎ (3 revisions)
  199. Neural Recording Interface and Spike Sorting Algorithm‏‎ (3 revisions)
  200. Design and Implementation of a Fully-digital Platform-independent Integrated Temperature Sensor Enabling DVFS in Open-source Tapeouts (1-3S/B)‏‎ (3 revisions)
  201. Towards a High-performance Open-source Verification Suite for AXI-based Systems (M/1-3S/B)‏‎ (3 revisions)
  202. Design of an on-field adaptable pulse-processing unit for semicondutor radiation detectors‏‎ (3 revisions)
  203. Embedded Gesture Recognition Using Novel Mini Radar Sensors‏‎ (3 revisions)
  204. Build the Fastest 2G Modem Ever‏‎ (3 revisions)
  205. DaCe on Snitch (M/1-3S)‏‎ (3 revisions - redirect page)
  206. Radiation Testing Board‏‎ (3 revisions - redirect page)
  207. Jammer Mitigation Meets Machine Learning‏‎ (3 revisions)
  208. Channel Decoding for TD-HSPA‏‎ (3 revisions)
  209. Mattia‏‎ (3 revisions)
  210. Continual Learning for Adaptive EEG Monitoring in Epileptic Seizure Detection‏‎ (3 revisions)
  211. Successive Approximation Register (SAR) ADC‏‎ (3 revisions)
  212. Audio DAC Conversion Jitter Measurement System‏‎ (3 revisions)
  213. Spatz grows wings: Physical Implementation of a Vector-Powered Manycore System (2S)‏‎ (3 revisions)
  214. Creating a Compact Power Supply and Monitoring System for the Occamy Chip (1-3S/B/2-3G)‏‎ (3 revisions)
  215. NeuroSoC RISC-V Component (M/1-2S)‏‎ (3 revisions)
  216. Fabian Schuiki‏‎ (4 revisions)
  217. GPT on the edge‏‎ (4 revisions)
  218. Non-binary LDPC Decoder for Deep-Space Optical Communications‏‎ (4 revisions)
  219. VLSI Implementation of a Systolic Array for LMMSE Detection in mmWave Massive MIMO-OFDM‏‎ (4 revisions)
  220. Edge Computing for Long-Term Wearable Biomedical Systems‏‎ (4 revisions)
  221. Low-Power Time Synchronization for IoT Applications‏‎ (4 revisions)
  222. Near-Memory Training of Neural Networks‏‎ (4 revisions)
  223. Autonomous Sensors For Underwater Monitoring In Smart Navy Systems‏‎ (4 revisions)
  224. AMZ Driverless Competition Embedded Systems Projects‏‎ (4 revisions)
  225. Design of State Retentive Flip-Flops‏‎ (4 revisions)
  226. Variability Tolerant Ultra Low Power Cluster‏‎ (4 revisions)
  227. Positioning for the cellular Internet of Things‏‎ (4 revisions)
  228. Android reliability governor‏‎ (4 revisions)
  229. Extending Our DMA Architecture with SiFives TileLink Protocol (1-3S/B)‏‎ (4 revisions)
  230. Smart Wearable System For Vital Sign Monitoring Exploiting On Board and Cloud Machine Learning‏‎ (4 revisions)
  231. Super Resolution Radar/Imaging at mm-Wave frequencies‏‎ (4 revisions)
  232. Guillaume Mocquard‏‎ (4 revisions)
  233. ASR-Waveformer‏‎ (4 revisions)
  234. DigitalUltrasoundHead‏‎ (4 revisions)
  235. Evaluating The Use of Snitch In The PsPIN RISC-V In-network Accelerator (M)‏‎ (4 revisions)
  236. Birds Long Term Monitoring With Ultra Low Power Wireless Sensor Node‏‎ (4 revisions)
  237. Spiking Neural Network for Motor Function Decoding Based on Neural Dust‏‎ (4 revisions)
  238. Hybrid Analog/Digital Leveling Loop for Very-Low-Distortion Oscillator‏‎ (4 revisions)
  239. Design of low-offset dynamic comparators‏‎ (4 revisions)
  240. Digital Transmitter for Cellular IoT‏‎ (4 revisions)
  241. Wireless Biomedical Signal Acquisition Device‏‎ (4 revisions)
  242. AnalogInt‏‎ (4 revisions)
  243. Theory, Algorithms, and Hardware for Beyond 5G‏‎ (4 revisions)
  244. A Waypoint-based Navigation System for Nano-Size UAVs in GPS-denied Environments‏‎ (4 revisions)
  245. Smart e-glasses for concealed recording of EEG signals‏‎ (4 revisions)
  246. Intelligent Power Management Unit (iPMU)‏‎ (4 revisions)
  247. Ibex: Bit-Manipulation Extension‏‎ (4 revisions)
  248. Power Optimization in Multipliers‏‎ (4 revisions)
  249. Improving our Smart Camera System‏‎ (4 revisions)
  250. Enhancing our DMA Engine with Fault Tolerance‏‎ (4 revisions)
  251. FPGA-based Implementation of a Novel Cell-Search Algorithm for Mobile Communications‏‎ (4 revisions)
  252. Hardware Exploration of Shared-Exponent MiniFloats (M)‏‎ (4 revisions)
  253. CPS Software-Configurable State-Machine‏‎ (4 revisions)
  254. Students' Interanational Competitions: F1(AMZ), Swissloop, Educational Rockets‏‎ (4 revisions)
  255. In-ear EEG signal acquisition‏‎ (4 revisions)
  256. Enhancing our DMA Engine with Vector Processing Capabilities (1-2S/B)‏‎ (4 revisions)
  257. Low-power chip-to-chip communication network‏‎ (4 revisions)
  258. An FPGA-Based Testbed for 3G Mobile Communications Receivers‏‎ (4 revisions)
  259. SHAre - An application Specific Instruction Set Processor for SHA-2/3‏‎ (4 revisions)
  260. ASIC Design of a Sigma Point Processor‏‎ (4 revisions)
  261. A Wearable Wireless Kidney Function Monitoring System For BioMedical Applications‏‎ (4 revisions)
  262. Final Report‏‎ (4 revisions)
  263. High performance continous-time Delta-Sigma ADC for biomedical applications‏‎ (4 revisions)
  264. Accelerating Applications Relying on Matrix-Vector-Product-Like Operations‏‎ (4 revisions)
  265. Palm size chip NMR‏‎ (4 revisions)
  266. Coherence-Capable Write-Back L1 Data Cache for Ariane‏‎ (4 revisions - redirect page)
  267. Forward error-correction ASIC using GRAND‏‎ (4 revisions)
  268. Telecommunications‏‎ (4 revisions)
  269. Smart Goggles for Visual In-Action Feedback in Ski Jumping (1 B/S)‏‎ (4 revisions)
  270. NAND Flash Open Research Platform‏‎ (4 revisions)
  271. Ultra-low power sampling front-end for acquisition of physiological signals‏‎ (4 revisions)
  272. Ultrasound High Speed Microbubble Tracking‏‎ (4 revisions)
  273. Stefan Lippuner‏‎ (4 revisions)
  274. A Snitch-Based SoC on iCE40 FPGAs (1-2S/B)‏‎ (4 revisions)
  275. SSR combined with FREP in LLVM/Clang (M/1-3S)‏‎ (4 revisions - redirect page)
  276. Sub-Noise Floor Channel Tracking‏‎ (4 revisions)
  277. Virtual Memory Ara‏‎ (4 revisions)
  278. Eye movements‏‎ (4 revisions)
  279. Accelerating Stencil Workloads on Snitch using ISSRs (1-2S/B)‏‎ (4 revisions)
  280. Pascal Hager‏‎ (4 revisions)
  281. Implementation of an AES Hardware Processing Engine (B/S)‏‎ (4 revisions)
  282. Stefan Mach‏‎ (4 revisions)
  283. Adding Linux Support to our DMA engine (1-2S/B)‏‎ (4 revisions - redirect page)
  284. Influence of the Initial FilamentGeometry on the Forming Step in CBRAM‏‎ (4 revisions)
  285. Finite element modeling of electrochemical random access memory‏‎ (4 revisions)
  286. EEG artifact detection with machine learning‏‎ (4 revisions)
  287. Jammer-Resilient Synchronization for Wireless Communications‏‎ (4 revisions)
  288. Efficient TNN compression‏‎ (4 revisions)
  289. Mixed-Precision Neural Networks for Brain-Computer Interface Applications‏‎ (4 revisions)
  290. Passive and Self Sustaining Receivers For On and Intra Body Communication For Wearable Sensors Networks‏‎ (4 revisions)
  291. Implementation of the RISC-V Bit Manipulation (RVB) extensions for our RI5CY core‏‎ (4 revisions)
  292. Routing 1000s of wires in Network-on-Chips (1-2S/M)‏‎ (4 revisions)
  293. Every individual on the planet should have a real chance to obtain personalized medical therapy‏‎ (4 revisions)
  294. IP-Based SoC Generation and Configuration (1-3S)‏‎ (4 revisions)
  295. Advanced Data Movers for Modern Neural Networks‏‎ (4 revisions)
  296. Improving Resiliency of Hyperdimensional Computing‏‎ (4 revisions)
  297. Energy Neutral Multi Sensors Wearable Device‏‎ (4 revisions)
  298. Influence of the Initial Filament Geometry on the Forming Step in CBRAM.‏‎ (4 revisions)
  299. Real-Time Motor-Imagery Classification Using Neuromorphic Processor‏‎ (4 revisions)
  300. Reconfigurable Fully-Unrolled 2D-FFT Core Generator for Multi-Antenna mmWave Communication‏‎ (4 revisions)
  301. Evaluating An Ultra low Power Vision Node‏‎ (4 revisions)
  302. Low Power Neural Network For Multi Sensors Wearable Devices‏‎ (4 revisions)
  303. Fitting Power Consumption of an IP-based HLS Approach to Real Hardware (1-3S)‏‎ (4 revisions)
  304. LightProbe - Thermal-Power aware on-head Beamforming‏‎ (5 revisions)
  305. Data Augmentation Techniques in Biosignal Classification‏‎ (5 revisions)
  306. A Unified-Multiplier Based Hardware Architecture for Elliptic Curve Cryptography‏‎ (5 revisions)
  307. IP-Based SoC Generation and Configuration (1-3S/B)‏‎ (5 revisions)
  308. Toward hyperdimensional active perception: learning compressed sensorimotor control by demonstration‏‎ (5 revisions)
  309. Design of a Prototype Chip with Interleaved Memory and Network-on-Chip‏‎ (5 revisions)
  310. Ultra Low Power Wake Up Radio for Wireless Sensor Network‏‎ (5 revisions)
  311. Predictable Execution on GPU Caches‏‎ (5 revisions)
  312. Low Power One bit Microphone for Acoustic Imaging Using A Parallel Processor‏‎ (5 revisions)
  313. Hardware Accelerator for Model Predictive Controller‏‎ (5 revisions)
  314. Ultrasound signal processing acceleration with CUDA‏‎ (5 revisions)
  315. Engineering For Kids‏‎ (5 revisions)
  316. Control an external ADC using Programmable Real-Time Unit (PRU) Subsystem on Beaglebone Black used as embedded HPC-performance-monitoring device‏‎ (5 revisions)
  317. Towards Autonomous Navigation for Nano-Blimps‏‎ (5 revisions)
  318. On-Device Training Sparse Sub-Tensor Update Scheme Optimization for CNN-based tasks (SA or MA)‏‎ (5 revisions)
  319. WCDMA/HSPA+ Synchronization System Design, Implementation, and Testing‏‎ (5 revisions)
  320. Pressure and acoustic Smart Sensors Network for Wind Turbines Monitoring‏‎ (5 revisions)
  321. TCNs vs. LSTMs for Embedded Platforms‏‎ (5 revisions)
  322. Low-power Clock Generation Solutions for 65nm Technology‏‎ (5 revisions)
  323. Federico Villani‏‎ (5 revisions)
  324. Switched-capacitor power amplifier for IoT mobile communications: design of signal processing path‏‎ (5 revisions)
  325. Ultrafast Medical Ultrasound imaging on a GPU‏‎ (5 revisions)
  326. An Energy Efficient Brain-Computer Interface using Mr.Wolf‏‎ (5 revisions)
  327. Next-Gen Ultrasound Imaging Systems (Industry Student Projects & PhD Opportunity)‏‎ (5 revisions)
  328. Design and Implementation of ultra low power vision system‏‎ (5 revisions)
  329. A RISC-V ISA Extension for Scalar Chaining in Snitch (M)‏‎ (5 revisions)
  330. Universal Stream Semantic Registers for Snitch (1S)‏‎ (5 revisions - redirect page)
  331. Phase-change memory devices for emerging computing paradigms‏‎ (5 revisions)
  332. Fast Simulation of Manycore Systems (1S)‏‎ (5 revisions)
  333. ASIC Design Projects‏‎ (5 revisions)
  334. A Wearable System To Control Phone And Electronic Device Without Hands‏‎ (5 revisions)
  335. Snitch meets iCE40 (1-2S/B)‏‎ (5 revisions - redirect page)
  336. Ferroelectric Memristors for Artificial Neural Networks (IBM-Zurich)‏‎ (5 revisions)
  337. Interfacing PULP with a Brain-Inspired Ultra-Low Power Spiking Cochlea‏‎ (5 revisions)
  338. Compression of Ultrasound data on FPGA‏‎ (5 revisions)
  339. High-Speed SAR ADC for next generation wireless communication in 12nm FinFET‏‎ (5 revisions)
  340. Soft-Output Viterbi Equalizer as part of Evolved EDGE baseband ASIC‏‎ (5 revisions)
  341. Final Presentation‏‎ (5 revisions)
  342. Electrothermal characterization of van der Waals Heterostructures with a partial overlap‏‎ (5 revisions)
  343. High-Throughput Authenticated Encryption Architectures based on Block Ciphers‏‎ (5 revisions)
  344. LLVM and DaCe for Snitch (1-2S)‏‎ (5 revisions)
  345. Channel Shortening Prefilter‏‎ (5 revisions - redirect page)
  346. Counter-based Fast Power Estimation using FPGAs (M/1-3S)‏‎ (5 revisions)
  347. Implementation of a NB-IoT Positioning System‏‎ (5 revisions)
  348. Energy-efficient Circuits for Fully Wireless Brain-machine Interfaces‏‎ (5 revisions)
  349. Resource Partitioning of Caches‏‎ (5 revisions)
  350. State-Saving @ NXP‏‎ (5 revisions)
  351. Indoor Smart Tracking of Hospital instrumentation‏‎ (5 revisions)
  352. Artificial Reverberation for Embedded Systems‏‎ (5 revisions)
  353. Low Latency Brain-Machine Interfaces‏‎ (5 revisions)
  354. Open Power-On Chip Controller Study and Integration‏‎ (5 revisions)
  355. Implementation of a Small and Energy-Efficient RISC-V-based Vector Accelerator (1M)‏‎ (5 revisions)
  356. Simulation of 2D artificial cilia metasurface in COMSOL‏‎ (5 revisions)
  357. IBM A2O Core‏‎ (5 revisions)
  358. Designing a Power Management Unit for PULP SoCs‏‎ (5 revisions)
  359. Adding Linux Support to our DMA Engine (1-2S/B)‏‎ (5 revisions)
  360. Beat DigRF‏‎ (5 revisions)
  361. Exploring feature selection and classification algorithms for ultra-low-power closed-loop systems for epilepsy control‏‎ (5 revisions)
  362. Ultra-low power transceiver for implantable devices‏‎ (5 revisions)
  363. A Wireless Sensor Network for a Smart Building Monitor and Control‏‎ (5 revisions)
  364. Image Sensor Interface and Pre-processing‏‎ (5 revisions)
  365. Inductive Charging Circuit for Implantable Devices‏‎ (5 revisions)
  366. Software-Defined Paging in the Snitch Cluster (2-3S)‏‎ (5 revisions)
  367. Hardware/software codesign neural decoding algorithm for “neural dust”‏‎ (5 revisions)
  368. Embedded Artificial Intelligence:Systems And Applications‏‎ (5 revisions)
  369. Machine Learning for extracting Muscle features from Ultrasound raw data‏‎ (5 revisions)
  370. FPGA Testbed Implementation for Bluetooth Indoor Positioning‏‎ (5 revisions)
  371. Ternary Neural Networks for Face Recognition‏‎ (5 revisions)
  372. Designing a Scalable Miniature I/O DMA (1-2B/1-3S/M)‏‎ (5 revisions)
  373. RISC-V based Implementation of Secure Ranging According to IEEE 802.15.4z UWB‏‎ (5 revisions)
  374. Low-Complexity MIMO Detection‏‎ (5 revisions)
  375. Smart Googles for Visual In-Action Feedback in Ski Jumping (1 B/S)‏‎ (5 revisions)
  376. Design of a Fused Multiply Add Floating Point Unit‏‎ (5 revisions)
  377. Development of an efficient algorithm for quantum transport codes‏‎ (5 revisions)
  378. Precise Ultra-low-power Timer‏‎ (5 revisions)
  379. Eye tracking‏‎ (5 revisions)
  380. An Ultra-Compact High-Power CMOS Power Amplifier for Millimeter-Wave 5G Communications‏‎ (5 revisions)
  381. Embedded Audio Source Localization Exploiting Coincidence Detection in Asynchronous Spike Streams‏‎ (5 revisions)
  382. LightProbe - Frontend Firmware and Control Side Channel‏‎ (5 revisions)
  383. Subject specific embeddings for transfer learning in brain-computer interfaces‏‎ (5 revisions)
  384. Predict eye movement through brain activity‏‎ (5 revisions)
  385. Learning Image Compression with Convolutional Networks‏‎ (5 revisions)
  386. Creating A Technology-independent USB1.0 Host Implementation Targetting ASICSs (1-3S/B)‏‎ (5 revisions)
  387. 5G Cellular RF Front-end Design in 22nm CMOS Technology‏‎ (5 revisions)
  388. Noise Figure Measurement for Cryogenic System‏‎ (5 revisions)
  389. Andreas Kurth‏‎ (5 revisions)
  390. Internet of Things SoC Characterization‏‎ (5 revisions)
  391. Toward Superposition of Brain-Computer Interface Models‏‎ (5 revisions)
  392. Ultra Low Power Conversion Circuit For Batteryless Applications‏‎ (5 revisions)
  393. Embedded Systems and autonomous UAVs‏‎ (5 revisions)
  394. Investigating the Cost of Special-Case Handling in Low-Precision Floating-Point Dot Product Units (1S)‏‎ (6 revisions)
  395. Developing a Transposition Unit to Accelerate ML Workloads (1-3S/B)‏‎ (6 revisions)
  396. Android Software Design‏‎ (6 revisions)
  397. Graph neural networks for epileptic seizure detection‏‎ (6 revisions)
  398. Enabling Efficient Systolic Execution on MemPool (M)‏‎ (6 revisions)
  399. LightProbe - Ultracompact Power Supply PCB‏‎ (6 revisions)
  400. Channel Estimation for 3GPP TD-SCDMA‏‎ (6 revisions)
  401. Electrically verifying a CMOS Multi-Modal Electrochemical, Impedance, and Optical Cellular Sensing Array for Massively Paralleled Exoelectrogen Screening‏‎ (6 revisions)
  402. Creating a HDMI Video Interface for PULP‏‎ (6 revisions)
  403. New RVV 1.0 Vector Instructions for Ara‏‎ (6 revisions)
  404. Implementing Configurable Dual-Core Redundancy‏‎ (6 revisions)
  405. Advanced Physical Design: Reinforcement Learning for Macro Placement and Mix-Placer (B/1-2S)‏‎ (6 revisions)
  406. MemPool on HERO (1S)‏‎ (6 revisions)
  407. PULPonFPGA: Lightweight Virtual Memory Support - Software Cache‏‎ (6 revisions)
  408. Implementation of a Heterogeneous System for Image Processing on an FPGA‏‎ (6 revisions)
  409. Pretraining Foundational Models for EEG Signal Analysis Using Open Source Large Scale Datasets‏‎ (6 revisions)
  410. Autonomous Smart Watches: Hardware and Software Desing‏‎ (6 revisions)
  411. Implementing DSP Instructions in Banshee (1S)‏‎ (6 revisions)
  412. CMOS power amplifier for field measurements in MRI systems‏‎ (6 revisions)
  413. Ultra-Efficient Visual Classification on Movidius Myriad2‏‎ (6 revisions)
  414. Low-power Temperature-insensitive Timer‏‎ (6 revisions)
  415. Extending the HERO RISC-V HPC stack to support multiple devices on heterogeneous SoCs (M/1-3S)‏‎ (6 revisions)
  416. Switched Capacitor Based Bandgap-Reference‏‎ (6 revisions)
  417. Resilient Brain-Inspired Hyperdimensional Computing Architectures‏‎ (6 revisions)
  418. Bluetooth Low Energy receiver in 65nm CMOS‏‎ (6 revisions)
  419. Classification of Evoked Local-Field Potentials in Rat Barrel Cortex using Hyper-dimensional Computing‏‎ (6 revisions)
  420. Optimal routing for 2D Mesh-based Analog Compute-In-Memory Accelerator Architecture (IBM-Zurich)‏‎ (6 revisions)
  421. Multiuser Equalization and Detection for 3GPP TD-SCDMA‏‎ (6 revisions)
  422. Novel Metastability Mitigation Technique‏‎ (6 revisions)
  423. FPGA-based Testbed Implementation of an Extended-Coverage Point-to-Point Communication Link for the Internet of Things‏‎ (6 revisions)
  424. Floating-Point Divide & Square Root Unit for Transprecision‏‎ (6 revisions)
  425. Improved Collision Avoidance for Nano-drones‏‎ (6 revisions)
  426. Exploring Algorithms for Early Seizure Detection‏‎ (6 revisions)
  427. Compression of iEEG Data‏‎ (6 revisions)
  428. Novel Methods for Jammer Mitigation‏‎ (6 revisions)
  429. Synchronization and Power Control Concepts for 3GPP TD-SCDMA‏‎ (6 revisions)
  430. FPGA Optimizations of Dense Binary Hyperdimensional Computing‏‎ (6 revisions)
  431. A Recurrent Neural Network Speech Recognition Chip‏‎ (6 revisions)
  432. VLSI Design of an Asynchronous LDPC Decoder‏‎ (6 revisions)
  433. Beat Cadence‏‎ (6 revisions)
  434. Exploring NAS spaces with C-BRED‏‎ (6 revisions)
  435. High-Throughput Hardware Implementations of Authenticated Encryption Algorithms‏‎ (6 revisions)
  436. Design of an Area-Optimized Soft-Error Resilient Processing Core for Safety-Critical Systems (1M)‏‎ (6 revisions)
  437. Bringup and Evaluation of an Energy-efficient Heterogeneous Manycore Compute Platform (1-2S)‏‎ (6 revisions)
  438. Next Generation Channel Decoder‏‎ (6 revisions)
  439. Writing a Hero runtime for EPAC (1-3S/B)‏‎ (6 revisions)
  440. Efficient Synchronization of Manycore Systems (M/1S)‏‎ (6 revisions)
  441. Self Aware Epilepsy Monitoring‏‎ (6 revisions)
  442. Design and Implementation of Digital Spiking Neurons for Ultra-Low-Power In-Cluster Coprocessors‏‎ (6 revisions)
  443. Towards Self Sustainable UAVs‏‎ (6 revisions)
  444. VLSI Implementation of a 5G Ciphering Accelerator‏‎ (6 revisions)
  445. Creating A Reshuffling Mid-end For Reorganizing Data Inside The Compute Cluster (1-3S/B)‏‎ (6 revisions)
  446. IBM Research–Zurich‏‎ (6 revisions)
  447. Benchmarking a RISC-V-based Server on LLMs/Foundation Models (SA or MA)‏‎ (6 revisions)
  448. Change-based Evaluation of Convolutional Neural Networks‏‎ (6 revisions)
  449. Ultrasound image data recycler‏‎ (6 revisions)
  450. FPGA mapping of RPC DRAM‏‎ (6 revisions)
  451. Moritz Schneider‏‎ (6 revisions)
  452. Design of a Low Power Smart Sensing Multi-modal Vision Platform‏‎ (6 revisions)
  453. Learning Image Decompression with Convolutional Networks‏‎ (6 revisions)
  454. System Emulation for AR and VR devices‏‎ (6 revisions)
  455. A Novel Execution Scheme for Ultra-tiny CNNs Aboard Nano-UAVs‏‎ (6 revisions)
  456. Building an RTL top level for a Mempool-based Heterogeneous SoC (M/1-3S)‏‎ (7 revisions)
  457. Outdoor Precision Object Tracking for Rockfall Experiments‏‎ (7 revisions)
  458. Mauro Salomon‏‎ (7 revisions)
  459. Contrastive Learning for Self-supervised Clustering of iEEG Data for Epileptic Patients‏‎ (7 revisions)
  460. High Performance Digitally-Assisted Time Domain ADC Design for DPLL used in Cellular IOT‏‎ (7 revisions)
  461. FFT HDL Code Generator for Multi-Antenna mmWave Communication‏‎ (7 revisions)
  462. Spiking Neural Network for Autonomous Navigation‏‎ (7 revisions)
  463. Creating a Free and Open-Source Verification Environment for Our New DMA Engine (1-3S/B)‏‎ (7 revisions)
  464. ISA extensions in the Snitch Processor for Signal Processing (1M)‏‎ (7 revisions)
  465. Bateryless Heart Rate Monitoring‏‎ (7 revisions)
  466. Make Cellular Internet of Things Receivers Smart‏‎ (7 revisions)
  467. Compressed Sensing for Wireless Biosignal Monitoring‏‎ (7 revisions)
  468. Streaming Integer Extensions for Snitch (M/1-2S)‏‎ (7 revisions)
  469. Variable Bit Precision Logic for Deep Learning and Artificial Intelligence‏‎ (7 revisions)
  470. High-Speed Digital-to-Analog Converter (DAC) for massive MIMO testing in 65nm CMOS‏‎ (7 revisions)
  471. RazorEDGE: An Evolved EDGE DBB ASIC‏‎ (7 revisions)
  472. Memory Augmented Neural Networks in Brain-Computer Interfaces‏‎ (7 revisions)
  473. Battery indifferent wearable Ultrasound‏‎ (7 revisions)
  474. Deep-Learning Based Phoneme Recognition from a Ultra-Low Power Spiking Cochlea‏‎ (7 revisions)
  475. Ibex: FPGA Optimizations‏‎ (7 revisions)
  476. Approximate Matrix Multiplication based Hardware Accelerator to achieve the next 10x in Energy Efficiency: Training Strategy And Algorithmic optimizations‏‎ (7 revisions)
  477. Synchronisation and Cyclic Prefix Handling For LTE Testbed‏‎ (7 revisions)
  478. A FPGA-based data streaming system that enables real-time monitoring of cell culture and neuroactivities‏‎ (7 revisions)
  479. Ultrasound-EMG combined hand gesture recognition‏‎ (7 revisions)
  480. Digital Audio Interface for Smart Intensive Computing Triggering‏‎ (7 revisions)
  481. Ultra-low power processor design‏‎ (7 revisions)
  482. Development of a Rockfall Sensor Node‏‎ (7 revisions)
  483. Indoor Positioning with Bluetooth‏‎ (7 revisions)
  484. Efficient NB-IoT Uplink Design‏‎ (7 revisions)
  485. A Flexible FPGA-Based Peripheral Platform Extending Linux-Capable Systems on Chip (1-3S/B)‏‎ (7 revisions)
  486. Digital Audio Processor for Cellular Applications‏‎ (7 revisions)
  487. LightProbe - 200G Remote DMA for GPU FPGA Data Transfers‏‎ (7 revisions)
  488. Optimizing the Pipeline in our Floating Point Architectures (1S)‏‎ (7 revisions)
  489. Efficient Search Design for Hyperdimensional Computing‏‎ (7 revisions)
  490. Analysis and Design of Power Efficient RF/ mm-Wave LC-tank Oscillator in 28nm for 5G communication applications‏‎ (7 revisions)
  491. LTE IoT Network Synchronization‏‎ (7 revisions)
  492. Ultrasound Low power WiFi with IMX7‏‎ (7 revisions)
  493. EEG artifact detection for epilepsy monitoring‏‎ (7 revisions)
  494. IoT Turbo Decoder‏‎ (7 revisions)
  495. SW/HW Predictability and Security‏‎ (7 revisions)
  496. Fault Tolerance‏‎ (7 revisions)
  497. Sub Noise Floor Channel Estimation for the Cellular Internet of Things‏‎ (7 revisions)
  498. Characterization techniques for silicon photonics-Lumiphase‏‎ (7 revisions)
  499. Transforming MemPool into a CGRA (M)‏‎ (7 revisions)
  500. Physical Layer Implementation of HSPA+ 4G Mobile Transceiver‏‎ (7 revisions)

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