Pages with the most categories

Showing below up to 50 results in range #1 to #50.

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1. Digital‏‎ (15 categories)
2. BigPULP: Multicluster Synchronization Extensions‏‎ (14 categories)
3. Smart Virtual Memory Sharing‏‎ (13 categories)
4. Low-Energy Cluster-Coupled Vector Coprocessor for Special-Purpose PULP Acceleration‏‎ (13 categories)
5. PULPonFPGA: Lightweight Virtual Memory Support - Multi-Level TLB‏‎ (12 categories)
6. PULPonFPGA: Lightweight Virtual Memory Support - Page Table Walker‏‎ (12 categories)
7. Extend the RI5CY core with priviledge extensions‏‎ (12 categories)
8. Real-Time ECG Contractions Classification‏‎ (12 categories)
9. Bringup and Evaluation of an Energy-efficient Heterogeneous Manycore Compute Platform (1-2S)‏‎ (12 categories)
10. Baseband Meets CPU‏‎ (12 categories)
11. PULPonFPGA: Lightweight Virtual Memory Support - Coherency Extensions‏‎ (12 categories)
12. A Snitch-based Compute Accelerator for HERO (M/1-2S)‏‎ (11 categories)
13. Implementation of the RISC-V Bit Manipulation (RVB) extensions for our RISC-V core‏‎ (11 categories)
14. An RPC DRAM Implementation for Energy-Efficient ASICs (1-2S)‏‎ (11 categories)
15. SSR combined with FREP in LLVM/Clang (M/1-3S)‏‎ (11 categories)
16. BigPULP: Shared Virtual Memory Multicluster Extensions‏‎ (11 categories)
17. High-Speed Channel Estimation & Tracking for V2X Communications‏‎ (11 categories)
18. Digital Front End Design & Frequency Offset Estimation for V2X Communications‏‎ (11 categories)
19. Cerebellum: Design of a Programmable Smart-Peripheral for the Ariane Core‏‎ (11 categories)
20. Creating a HDMI Video Interface for PULP‏‎ (11 categories)
21. A Flexible Peripheral System for High-Performance Systems on Chip (M)‏‎ (11 categories)
22. BCI-controlled Drone‏‎ (11 categories)
23. High-Throughput Channel Coding & Decoding for V2X Communications‏‎ (11 categories)
24. DaCe on Snitch (M/1-3S)‏‎ (11 categories)
25. Machine Learning-based Compressive Sensing Vehicle Location Tracking ASIC Design‏‎ (11 categories)
26. Data Augmentation Techniques in Biosignal Classification‏‎ (11 categories)
27. A Wireless Sensor Network for HPC monitoring‏‎ (11 categories)
28. Floating-Point Divide & Square Root Unit for Transprecision‏‎ (10 categories)
29. Memory Augmented Neural Networks in Brain-Computer Interfaces‏‎ (10 categories)
30. Timing Channel Mitigations for RISC-V Cores‏‎ (10 categories)
31. Spatio-Temporal Video Filtering‏‎ (10 categories)
32. Shared Correlation Accelerator for an RF SoC‏‎ (10 categories)
33. Knowledge Distillation for Embedded Machine Learning‏‎ (10 categories)
34. Low Latency Brain-Machine Interfaces‏‎ (10 categories)
35. Design of an Ultra-Reliable Low-Latency Modem‏‎ (10 categories)
36. PULPonFPGA: Lightweight Virtual Memory Support - Physically Contiguous Memory‏‎ (10 categories)
37. Hardware Constrained Neural Architechture Search‏‎ (10 categories)
38. PULPonFPGA: Lightweight Virtual Memory Support - Software Cache‏‎ (10 categories)
39. Hypervisor Extension for Ariane (M)‏‎ (10 categories)
40. Real-Time Embedded Classification of Neural Activity in Rat Barrel Cortex‏‎ (10 categories)
41. StoneEDGE: An EC-GSM-IoT and Evolved EDGE PHY ASIC‏‎ (10 categories)
42. GUI-developement for an action-cam-based eye tracking device‏‎ (10 categories)
43. Accelerator for Spatio-Temporal Video Filtering‏‎ (10 categories)
44. Autoencoder Accelerator for On-Chip Semi-Supervised Learning‏‎ (10 categories)
45. Compression of iEEG Data‏‎ (10 categories)
46. Design and Implementation of a multi-mode multi-master I2C peripheral‏‎ (10 categories)
47. Enabling Standalone Operation for a Mobile Health Platform‏‎ (10 categories)
48. Wireless Communication Systems for the IoT‏‎ (10 categories)
49. IP-Based SoC Generation and Configuration (1-3S/B)‏‎ (10 categories)
50. An FPGA-Based Testbed for 3G Mobile Communications Receivers‏‎ (10 categories)

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