Pages with the most categories
From iis-projects
Showing below up to 100 results in range #1 to #100.
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- Digital (15 categories)
- BigPULP: Multicluster Synchronization Extensions (14 categories)
- Smart Virtual Memory Sharing (13 categories)
- Low-Energy Cluster-Coupled Vector Coprocessor for Special-Purpose PULP Acceleration (13 categories)
- PULPonFPGA: Lightweight Virtual Memory Support - Multi-Level TLB (12 categories)
- PULPonFPGA: Lightweight Virtual Memory Support - Page Table Walker (12 categories)
- Extend the RI5CY core with priviledge extensions (12 categories)
- Real-Time ECG Contractions Classification (12 categories)
- Bringup and Evaluation of an Energy-efficient Heterogeneous Manycore Compute Platform (1-2S) (12 categories)
- Baseband Meets CPU (12 categories)
- PULPonFPGA: Lightweight Virtual Memory Support - Coherency Extensions (12 categories)
- A Snitch-based Compute Accelerator for HERO (M/1-2S) (11 categories)
- Implementation of the RISC-V Bit Manipulation (RVB) extensions for our RISC-V core (11 categories)
- An RPC DRAM Implementation for Energy-Efficient ASICs (1-2S) (11 categories)
- SSR combined with FREP in LLVM/Clang (M/1-3S) (11 categories)
- BigPULP: Shared Virtual Memory Multicluster Extensions (11 categories)
- High-Speed Channel Estimation & Tracking for V2X Communications (11 categories)
- Digital Front End Design & Frequency Offset Estimation for V2X Communications (11 categories)
- Cerebellum: Design of a Programmable Smart-Peripheral for the Ariane Core (11 categories)
- Creating a HDMI Video Interface for PULP (11 categories)
- A Flexible Peripheral System for High-Performance Systems on Chip (M) (11 categories)
- BCI-controlled Drone (11 categories)
- High-Throughput Channel Coding & Decoding for V2X Communications (11 categories)
- DaCe on Snitch (M/1-3S) (11 categories)
- Machine Learning-based Compressive Sensing Vehicle Location Tracking ASIC Design (11 categories)
- Data Augmentation Techniques in Biosignal Classification (11 categories)
- A Wireless Sensor Network for HPC monitoring (11 categories)
- Floating-Point Divide & Square Root Unit for Transprecision (10 categories)
- Memory Augmented Neural Networks in Brain-Computer Interfaces (10 categories)
- Spatio-Temporal Video Filtering (10 categories)
- StoneEDGE: An EC-GSM-IoT and Evolved EDGE PHY ASIC (10 categories)
- Shared Correlation Accelerator for an RF SoC (10 categories)
- Knowledge Distillation for Embedded Machine Learning (10 categories)
- Low Latency Brain-Machine Interfaces (10 categories)
- Wireless Communication Systems for the IoT (10 categories)
- Design of an Ultra-Reliable Low-Latency Modem (10 categories)
- PULPonFPGA: Lightweight Virtual Memory Support - Physically Contiguous Memory (10 categories)
- Hardware Constrained Neural Architechture Search (10 categories)
- PULPonFPGA: Lightweight Virtual Memory Support - Software Cache (10 categories)
- Hypervisor Extension for Ariane (M) (10 categories)
- Real-Time Embedded Classification of Neural Activity in Rat Barrel Cortex (10 categories)
- GUI-developement for an action-cam-based eye tracking device (10 categories)
- Accelerator for Spatio-Temporal Video Filtering (10 categories)
- Autoencoder Accelerator for On-Chip Semi-Supervised Learning (10 categories)
- Timing Channel Mitigations for RISC-V Cores (10 categories)
- Compression of iEEG Data (10 categories)
- Design and Implementation of a multi-mode multi-master I2C peripheral (10 categories)
- Enabling Standalone Operation for a Mobile Health Platform (10 categories)
- IP-Based SoC Generation and Configuration (1-3S/B) (10 categories)
- An FPGA-Based Testbed for 3G Mobile Communications Receivers (10 categories)
- Investigation of the high-performance multi-threaded OoO IBM A2O Core (1-3S) (10 categories)
- PULPonFPGA: Hardware L2 Cache (10 categories)
- ISA extensions in the Snitch Processor for Signal Processing (M) (10 categories)
- IoT Turbo Decoder (10 categories)
- Contrastive Learning for Self-supervised Clustering of iEEG Data for Epileptic Patients (10 categories)
- SmartRing (9 categories)
- Active-Set QP Solver on FPGA (9 categories)
- Channel Estimation for 5G Cellular IoT and Fast Fading Channels (9 categories)
- Multi issue OoO Ariane Backend (M) (9 categories)
- Design and VLSI Implementation of a Constrained-Viterbi Algorithm Equalizer for 3GPP TD-HSPA (9 categories)
- An all Standard-Cell Based Energy Efficient HW Accelerator for DSP and Deep Learning Applications (9 categories)
- Convolution Neural Networks on our Ultra-Low Power Mult-Core Plattform PULP (9 categories)
- Internet of Things Network Synchronizer (9 categories)
- Real-time eye movement analysis on a tablet computer (9 categories)
- Short Range Radars For Biomedical Application (9 categories)
- Improved State Estimation on PULP-based Nano-UAVs (9 categories)
- Autonomus Drones With Novel Sensors And Ultra Wide Band (9 categories)
- NVDLA meets PULP (9 categories)
- HERO: TLB Invalidation (9 categories)
- Improving Cold-Start in Batteryless And Energy Harvesting Systems (9 categories)
- Next Generation Synchronization Signals (9 categories)
- Visualizing Functional Microbubbles using Ultrasound Imaging (9 categories)
- Physics is looking for PULP (9 categories)
- A Multiview Synthesis Core in 65 nm CMOS (9 categories)
- Implementation of a Heterogeneous System for Image Processing on an FPGA (S) (9 categories)
- BLISS - Battery-Less Identification System for Security (9 categories)
- System Analysis and VLSI Design of NB-IoT Baseband Processing (9 categories)
- Monocular Vision-based Object Following on Nano-size Robotic Blimp (9 categories)
- Deep neural networks for seizure detection (9 categories)
- Optimal System Duty Cycling for a Mobile Health Platform (9 categories)
- PULP in space - Fault Tolerant PULP System for Critical Space Applications (9 categories)
- Real-Time Motor-Imagery Classification Using Neuromorphic Processor (9 categories)
- Towards global Brain-Computer Interfaces (9 categories)
- Design and Implementation of an Approximate Floating Point Unit (9 categories)
- Exploring Bio Impedance (9 categories)
- Learning Image Decompression with Convolutional Networks (9 categories)
- Coherence-Capable Write-Back L1 Data Cache for Ariane (M) (9 categories)
- MemPool on HERO (1S) (9 categories)
- Trace Debugger for custom RISC-V Core (9 categories)
- Neural Network Algorithms and Interfaces with Accelerators for Embedded Platforms with Real World Applications (9 categories)
- High-throughput Embedded System For Neurotechnology in collaboration with INI (8 categories)
- A Wireless Sensor Network for a Smart Building Monitor and Control (8 categories)
- Indoor Positioning with Bluetooth (8 categories)
- Level Crossing ADC For a Many Channels Neural Recording Interface (8 categories)
- Machine Learning on Ultrasound Images (8 categories)
- Combining Spiking Neural Networks with Hyperdimensional Computing for Autonomous Navigation (8 categories)
- PREM Intervals and Loop Tiling (8 categories)
- Event-Driven Convolutional Neural Network Modular Accelerator (8 categories)
- Exploring schedules for incremental and annealing quantization algorithms (8 categories)
- FPGA-Based Digital Frontend for 3G Receivers (8 categories)