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- 14:37, 5 January 2021 Bringup and Evaluation of an Energy-efficient Heterogeneous Manycore Compute Platform (1-2S) (hist) [10,920 bytes] Paulsc (talk | contribs) (Created page with "<!-- Bringup and Evaluation of an Energy-efficient Heterogeneous Manycore Compute Platform (1-2S) --> = Overview = == Status: Available == * Type: Semester Thesis * Profess...")
- 10:51, 23 December 2020 Short Range Radars For Biomedical Application (hist) [4,906 bytes] Magnom (talk | contribs) (Created page with "600px|right|thumb ==Short Description== Short Range radars have been shown potentially to be used in many application scenarios including for remote se...")
- 17:53, 18 December 2020 An RPC DRAM Implementation for Energy-Efficient ASICs (1-2S) (hist) [8,260 bytes] Tbenz (talk | contribs) (create)
- 17:33, 8 December 2020 Matheus Cavalcante (hist) [890 bytes] Matheusd (talk | contribs) (Created page with "== Matheus Cavalcante == thumb|200px| * '''e-mail''': [mailto:matheusd@iis.ee.ethz.ch matheusd@iis.ee.ethz.ch] Category:Digital I receiv...")
- 12:18, 30 November 2020 Smart Patch For Heath Care And Rehabilitation (hist) [7,308 bytes] Magnom (talk | contribs) (Created page with "600px|right|thumb ==Short Description== Autonomous drones deployed in combination with onboard novel sensors (such as short-range radar, CMOS op...")
- 10:38, 30 November 2020 Autonomus Drones With Novel Sensors And Ultra Wide Band (hist) [4,671 bytes] Magnom (talk | contribs) (Created page with "600px|right|thumb ==Short Description== Autonomous drones deployed in combination with onboard novel sensors (such as short range radar, CMOS op...")
- 16:21, 26 November 2020 Evaluating memory access pattern specializations in OoO, server-grade cores (M) (hist) [6,852 bytes] Paulsc (talk | contribs) (Created page with "Category:Digital Category:High Performance SoCs Category:Computer Architecture Category:2020 Category:Master Thesis Category:Paulsc Category:Availabl...")
- 18:16, 24 November 2020 Beamspace processing for 5G mmWave massive MIMO on GPU (hist) [4,512 bytes] Smirfarsh (talk | contribs) (Created page with "==Short Description== Millimeter-wave (mmWave) communication is a key technology component of 5G and beyond 5G (B5G) as it offers a significant increase in data-rates due to...")
- 07:57, 24 November 2020 Evaluating An Ultra low Power Vision Node (hist) [2,895 bytes] Scheremo (talk | contribs) (Created page with "==Introduction== With the on-going surge of interest in bringing machine learning to wearables and the edge of computing devices, novel solutions to reducing the energy consum...")
- 23:33, 16 November 2020 Hypervisor Extension for Ariane (M) (hist) [2,627 bytes] Nwistoff (talk | contribs) (Created page with "Category:Digital Category:SW/HW Predictability and Security Category:High Performance SoCs Category:Computer Architecture Category:2020 Category:Master T...")
- 18:11, 16 November 2020 FFT HDL Code Generator for Multi-Antenna mmWave Communication (hist) [3,553 bytes] Smirfarsh (talk | contribs) (Created page with "==Short Description== The millimeter wave (mmWave) spectrum (30 GHz to 300 GHz) provides vast amounts of unused frequency bands available for high-bandwidth wireless communic...")
- 15:52, 16 November 2020 Energy Efficient SoCs (hist) [2,625 bytes] Meggiman (talk | contribs) (Created page with "<!-- File:NVIDIA Tesla V100.jpg|small|right|A NVIDIA Tesla V100 GP-GPU. This cutting-edge accelerator provides huge computational power on a [https://arstechnica.com/gadge...")
- 14:52, 16 November 2020 Mapping Networks on Reconfigurable Binary Engine Accelerator (hist) [4,645 bytes] Paulin (talk | contribs) (Created page with "<!-- thumb ---> ==Short Description== We have recently designed an accelerator called Reconfigurable Binary Engine (RBE). The RBE architecture...")
- 11:00, 16 November 2020 Probabilistic training algorithms for quantized neural networks (hist) [4,198 bytes] Spmatteo (talk | contribs) (Created page with "== Introduction == In a recent theoretical research work, we have identified principled ways to compute gradients directed towards the parameters of DNNs that use quantized ac...")
- 10:37, 16 November 2020 Exploring schedules for incremental and annealing quantization algorithms (hist) [6,111 bytes] Spmatteo (talk | contribs) (Created page with "== Introduction == == Project description == == References == == Competences == Required: * Algorithms & data structures * Python programming * Basic knowledge in deep...")
- 14:33, 13 November 2020 ASIC Development of 5G-NR LDPC Decoder (hist) [3,368 bytes] Susman (talk | contribs) (Created page with "thumb|400px|5G Communication, Source: https://medium.comthumb|400px|5G LDPC Codes, Source: IEEE Access, DOI: 10.1109/ACCESS.2018.2868963....")
- 13:05, 13 November 2020 VLSI Implementation of a 5G Ciphering Accelerator (hist) [3,317 bytes] Mkorb (talk | contribs) (Created page with "thumb|400px|Channel Decoder in Today's Communication Systems ==Short Description== Today, Turbo Decoder and LDPC Decoder are well establishe...")
- 14:54, 12 November 2020 Machine Learning on Ultrasound Images (hist) [1,864 bytes] Cosandre (talk | contribs) (Created page with "== Short Description == Ultrasound imaging is a non-invasive imaging technique that provides visible information on the structure of musculoskeletal tissues and organs. The de...")
- 12:57, 12 November 2020 Real-Time Optimization (hist) [121 bytes] Caoscar (talk | contribs) (Created page with "==Available Projects== <DynamicPageList> suppresserrors = true category = Available category = IIP_OPT </DynamicPageList>")
- 12:00, 12 November 2020 Low Latency Brain-Machine Interfaces (hist) [4,328 bytes] Herschmi (talk | contribs) (Created page with "Category:DigitalCategory:Semester ThesisCategory:Master Thesis Category:In progress Category:2020Category:HotCategory:Human IntranetCategory:xiay...")
- 10:52, 12 November 2020 Deep Unfolding of Iterative Optimization Algorithms (hist) [6,125 bytes] Caoscar (talk | contribs) (Created page with "700px|thumb|Example of algorithm unrolled using Deep Unfolding. The parameters to learn in this example are delta and tau. ==Short Desc...")
- 10:37, 12 November 2020 Low-Resolution 5G Beamforming Codebook Design (hist) [6,549 bytes] Caoscar (talk | contribs) (Created page with "File:IIP_FAME_EXH_beampattern.png|350px|thumb|Beamforming enables control of the beam pattern to focus energy to/from a specific direction. In this example, we want to focus...")
- 10:08, 12 November 2020 Design-Space Exploration of Low-Resolution Matrix-Vector Multipliers (hist) [5,381 bytes] Caoscar (talk | contribs) (Created page with "File:IIP_MVP_outer_cannon.png|575px|thumb|Two example different ways to operate a matrix-vector product that we will consider in this project: The top row performs a naïve...")
- 14:25, 11 November 2020 Snitch meets iCE40 (1-2S/B) (hist) [2,395 bytes] Tbenz (talk | contribs) (Created page with "Category:Digital Category:High Performance SoCs Category:2020 Category:Bachelor Thesis Category:Semester Thesis Category:Paulsc Category:Tbenz Ca...")
- 13:34, 11 November 2020 Quest for the smallest Turing-complete core (2-3G) (hist) [1,631 bytes] Tbenz (talk | contribs) (Created page with "Category:Digital Category:High Performance SoCs Category:2020 Category:Group Project Category:Paulsc Category:Tbenz Category:Available == Introduc...")
- 11:31, 11 November 2020 RISC-V base ISA for ultra-low-area cores (2-3G) (hist) [2,227 bytes] Tbenz (talk | contribs) (Created page with "Category:Digital Category:High Performance SoCs Category:2020 Category:Group Project Category:Paulsc Category:Tbenz Category:Available == Introduc...")
- 10:53, 11 November 2020 Biomedical Circuits, Systems, and Applications (hist) [4,333 bytes] Xiaywang (talk | contribs) (Created page with "=Biomedical Engineering= thumb|right|450px The world around us is getting a lot smarter quickly: virtually every single component of our daily l...")
- 19:24, 10 November 2020 IP-Based SoC Generation and Configuration (1-3S/B) (hist) [3,793 bytes] Tbenz (talk | contribs) (Created page with "Category:Digital Category:High Performance SoCs Category:Computer Architecture Category:2020 Category:Semester Thesis Category:Paulsc [[Category:Tbenz]...")
- 17:44, 10 November 2020 SW/HW Predictability and Security (hist) [997 bytes] Bjoernf (talk | contribs) (Created page with "Please continue to Predictable_Execution if you are interested in timing predictable/safety critical embedded systems. Please continue to Cryptography if you are inter...")
- 16:20, 10 November 2020 Hardware Acceleration (hist) [6,812 bytes] Paulin (talk | contribs) (Created page with "File:NVIDIA Tesla V100.jpg|thumb|right|A NVIDIA Tesla V100 GP-GPU. This cutting-edge accelerator provides huge computational power on a [https://arstechnica.com/gadgets/2017...")
- 15:52, 10 November 2020 Embedded Systems and autonomous UAVs (hist) [4,674 bytes] Paulin (talk | contribs) (Created page with "thumb|600px ==Short Description== Sensors and related technologies have enjoyed considerable success, as demonstrated by the increasing number...")
- 17:43, 5 November 2020 Practical Reconfigurable Intelligent Surfaces (RIS) (hist) [8,001 bytes] Vmenescal (talk | contribs) (Created page with "500px|thumb|Cell-free mmWave massive MIMO network [4]. ==Short Description== Since the beginning of research for fifth-generation (5...")
- 16:40, 5 November 2020 Cell-Free mmWave Massive MIMO Communication (hist) [7,003 bytes] Vmenescal (talk | contribs) (Created page with "1000px|thumb|Micrograph of a chip containing standard-cell-based PPAC. ==Short Description== While the fifth generation (5G) of...")
- 16:02, 5 November 2020 Self-Supervised User Positioning in Cell-Free Massive MIMO Systems (hist) [7,712 bytes] Vmenescal (talk | contribs) (Created page with "New Note 1 1000px|thumb|Micrograph of a chip containing standard-cell-based PPAC. ==Short Description== Massive multiple-input...")
- 11:23, 5 November 2020 All-Digital In-Memory Processing (hist) [121 bytes] Studer (talk | contribs) (Created page with "==Available Projects== <DynamicPageList> suppresserrors = true category = Available category = IIP_PIM </DynamicPageList>")
- 11:20, 5 November 2020 Semi-Custom Digital VLSI for Processing-in-Memory (hist) [6,917 bytes] Studer (talk | contribs) (Created page with "1000px|thumb|Micrograph of a chip containing standard-cell-based PPAC. ==Short Description== Traditional hardware architectures...")
- 10:29, 5 November 2020 Efficient TNN compression (hist) [3,168 bytes] Scheremo (talk | contribs) (Created page with "==Introduction== While most recent research in ultra-low precision neural network design has focused on Binary Neural Networks (BNNs), Ternary Neural Networks (TNNs) have very...")
- 18:24, 2 November 2020 ISA extensions in the Snitch Processor for Signal Processing (M) (hist) [9,155 bytes] Tbenz (talk | contribs) (Created page with "= Introduction = Striving for high image quality, even on mobile devices, has lead to an increase in pixel count in smartphone cameras over the last decade [<nowiki/>#ref-...")
- 18:03, 2 November 2020 ISA extensions in the Snitch Processor for Signal Processing (1M) (hist) [0 bytes] Sriedel (talk | contribs) (Created page with "<!-- (M/1-3S/1-3B/2-3G): ISA extensions in the Snitch Processor for Signal Processing --> = Introduction = Striving for high image quality, even on mobile devices, has lead...")
- 17:45, 2 November 2020 Matteo Perotti (hist) [1,017 bytes] Tbenz (talk | contribs) (Created page with "He is a dude doing stuff.")
- 17:42, 2 November 2020 MemPool on HERO (1S) (hist) [6,163 bytes] Sriedel (talk | contribs) (Created page with "== Introduction == Heterogeneous systems combine a general-purpose host processor with domain-specific Programmable Many-Core Accelerators (PMCAs). Such systems are highly ve...")
- 17:00, 2 November 2020 MemPool on HERO (hist) [0 bytes] Sriedel (talk | contribs) (Created page with "== Introduction == Heterogeneous systems combine a general-purpose host processor with domain-specific Programmable Many-Core Accelerators (PMCAs). Such systems are highly ve...")
- 16:59, 2 November 2020 SystemVerilog formatter for our LowRISC-based guidelines (2-3G) (hist) [2,470 bytes] Tbenz (talk | contribs) (Created page with "Coding conventions are an '''essential part''' of every large hardware (and software) project. They guide various '''non-functional aspects''' of the project and the source co...")
- 16:38, 2 November 2020 Physical Implementation of MemPool, PULP's Manycore System (1M/1-2S) (hist) [7,764 bytes] Matheusd (talk | contribs) (Created page with "== Introduction == In a quest for high-performance computing systems, few architectural models retain the flexibility of many-core systems. Those systems integrate a very la...") originally created as "Physical Implementation of MemPool, PULP's Manycore System"
- 16:15, 2 November 2020 Software-Defined Paging in the Snitch Cluster (2-3S) (hist) [3,999 bytes] Paulsc (talk | contribs) (Created page with "Category:Digital Category:High Performance SoCs Category:Computer Architecture Category:2020 Category:Semester Thesis Category:Tbenz [[Category:Paulsc]...")
- 12:03, 2 November 2020 DaCe on Snitch (M/1-3S) (hist) [2,444 bytes] Tbenz (talk | contribs) (Created page with "Category:Digital Category:High Performance SoCs Category:Computer Architecture Category:2020 Category:Master Thesis Category:Semester Thesis Category...")
- 12:02, 2 November 2020 SSR combined with FREP in LLVM/Clang (M/1-3S) (hist) [2,607 bytes] Tbenz (talk | contribs) (Created page with "Category:Digital Category:High Performance SoCs Category:Computer Architecture Category:2020 Category:Master Thesis Category:Semester Thesis Category...")
- 11:58, 2 November 2020 Multi issue OoO Ariane Backend (M) (hist) [3,247 bytes] Tbenz (talk | contribs) (Created page with "Category:Digital Category:High Performance SoCs Category:Computer Architecture Category:2020 Category:Master Thesis Category:Semester Thesis Category...")
- 11:55, 2 November 2020 Coherence-Capable Write-Back L1 Data Cache for Ariane (M) (hist) [2,789 bytes] Tbenz (talk | contribs) (Created page with "Category:Digital Category:High Performance SoCs Category:Computer Architecture Category:2020 Category:Master Thesis Category:Semester Thesis Category...")
- 11:48, 2 November 2020 Implementation of a Heterogeneous System for Image Processing on an FPGA (S) (hist) [5,057 bytes] Tbenz (talk | contribs) (Created page with "== Introduction == Heterogeneous systems combine a general-purpose host processor with domain-specific Programmable Many-Core Accelerators (PMCAs). Such systems are highly ve...") originally created as "Implementation of a Heterogeneous System for Image Processing on an FPGA (M)"
![500px|thumb|Cell-free mmWave massive MIMO network [4].](/index.php?title=File:Figure_cell_free_mmwave_mimo.png){kind=link}
