Information for "SystemVerilog formatter for our LowRISC-based guidelines (2-3G)"
From iis-projects
Basic information
Display title | SystemVerilog formatter for our LowRISC-based guidelines (2-3G) |
Default sort key | SystemVerilog formatter for our LowRISC-based guidelines (2-3G) |
Page length (in bytes) | 2,479 |
Page ID | 1335 |
Page content language | English (en) |
Page content model | wikitext |
Indexing by robots | Allowed |
Number of redirects to this page | 0 |
Counted as a content page | Yes |
Page protection
Edit | Allow all users (infinite) |
Move | Allow all users (infinite) |
Edit history
Page creator | Tbenz (talk | contribs) |
Date of page creation | 17:59, 2 November 2020 |
Latest editor | Paulsc (talk | contribs) |
Date of latest edit | 19:57, 29 July 2021 |
Total number of edits | 10 |
Total number of distinct authors | 2 |
Recent number of edits (within past 90 days) | 0 |
Recent number of distinct authors | 0 |