Ultra-low power sampling front-end for acquisition of physiological signals
From iis-projects
Contents
Short Description
Beside being small low power consumption is a key asset for implantable devices. This is often in conflict with performance as the latter is commonly linked with higher current consumption. Duty-cycling is a way to partially resolve the issue as the higher current to obtain the desired performance is only needed for a short time, and the circuit is then set to minimum power dissipation for the rest of the time. In this thesis we plan to develop such a circuit for the acquisition of physiological signals. In order to allow duty-cycling the signal has to be sampled in front and be amplified with a switched capacitor circuit before converting it into the digital domain. In this thesis it will be possible to learn the whole the design cycle including system simulation and layout as a master student, for a semester thesis the work is reduced to the simulation of the main building blocks.
Status: Available
- Looking for 1-2 Semester or master students
- Contact: Thomas Burger
Prerequisites
- AIC
Character
- 30% Theory
- 20% System Investigations (Calculation, Matlab)
- 50% Circuit Design