I received my B.Sc. and M.Sc in electrical engineering from ETH Zürich in 2018 and 2020, respectively, where I am currently pursuing a Ph.D. degree under the Digital Circuits and Systems group of Prof. Luca Benini.
My current research interests include
- Energy-efficient high-performance SoCs
- Manycore systems
- Sparse computing.
If any of these sound interesting to you, do not hesitate to contact me or come by my office!
- An RPC DRAM Implementation for Energy-Efficient ASICs (1-2S)
- Evaluating memory access pattern specializations in OoO, server-grade cores (M)
- RISC-V base ISA for ultra-low-area cores (2-3G)
- IP-Based SoC Generation and Configuration (1-3S/B)
- SystemVerilog formatter for our LowRISC-based guidelines (2-3G)
- Investigation of the high-performance multi-threaded OoO IBM A2O Core (1-3S)
Projects In Progress
- A Snitch-based Compute Accelerator for HERO (M/1-2S)
- A Flexible Peripheral System for High-Performance Systems on Chip (M)