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Revision as of 08:49, 5 January 2023


Status: Available

Introduction

Recent PULP chips, such as Occamy or Neo, feature a Linux-capable CVA6 core [1] and a Serial Link off-chip interface. While the chips contain a few basic peripherals that allow running Linux (such as UART, GPIO), further peripherals to extend their functionality (e.g. Ethernet, USB Host, DVI/HDMI) are desirable.

The idea of this project is to bring up an FPGA-based peripheral platform that can be connected to existing chips via Serial Link to extend their functionality.

Project

This project involves both creating the FPGA platform and extending the software stack (e.g. Linux) running on the ASIC to use it.

Tasks
Hardware Design
  • Serial-Link-capable base platform: Design an FPGA platform that can be accessed via Serial Link.
  • Integration of an Ethernet Peripheral: Integrate an Ethernet controller that communicates with the on-board Ethernet PHY.
  • Integration of PAPER: Integrate PAPER, a DVI/HDMI peripheral developed in previous student projects.
Software Design
  • Bare-Metal Applications: Prototype bare-metal applications that access the integrated peripherals.
  • U-Boot and Linux Device Drivers: Integrate the necessary drivers in U-Boot and Linux to use the integrated peripherals


Stretch Goals

Depending on your progress and interests, several further steps can be considered, such as:

  • Integration of further peripherals: Further peripherals can be integrated in hardware and software, such as SPI devices and a USB Host.

We can also discuss targeting a subset of the tasks above depending on your time frame and interests.

Requirements
  • Strong interest system design and hardware/software interaction
  • Experience with HDLs (preferably SystemVerliog) such as taught in VLSI I
  • Basic knowledge of operating systems

Composition: 40% RTL Implementation, 20% Verification, 40% Software Design

Project Supervisors

References