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Accelerators for object detection and tracking - Revision history
2024-03-29T10:24:42Z
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Kgf at 08:57, 5 November 2019
2019-11-05T08:57:34Z
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Kgf
http://iis-projects.ee.ethz.ch/index.php?title=Accelerators_for_object_detection_and_tracking&diff=105&oldid=prev
Kgf: Created page with "240px ==Short Description== At the IIS we are working on an ultra low-power multi-processor shared-memory clu..."
2014-01-17T08:45:29Z
<p>Created page with "<a href="/index.php?title=File:Accelerators_for_object_detection_and_tracking.jpg" title="File:Accelerators for object detection and tracking.jpg">thumb|240px</a> ==Short Description== At the IIS we are working on an ultra low-power multi-processor shared-memory clu..."</p>
<p><b>New page</b></p><div>[[File:Accelerators for object detection and tracking.jpg|thumb|240px]]<br />
==Short Description==<br />
At the IIS we are working on an ultra low-power multi-processor<br />
shared-memory cluster realized in 28nm SOI technology. One of the<br />
applications for this system is in real-time video applications, expecially<br />
in systems where objects and/or people need to be identified and tracked<br />
in a live video stream.<br />
<br />
In this project, you will design a hardware accelerator for image<br />
processing applications that can be included in the multi-processor<br />
system, improving the energy efficiency of the system. The accelerator will<br />
be designed so that it can connect to the existing infrastructure of the<br />
current system.<br />
<br />
By doing this project, you will gain experience in designing a complex<br />
heterogeneous computing system in nano-meter technology. You will learn<br />
recipes to create a balanced mix of configurable special function<br />
accelerators and parallel programmable platforms to achieve maximum energy<br />
efficiency. You will also become part of the team that is currently<br />
developing the multi-processor shared-memory cluster.<br />
<br />
===Status: Available ===<br />
: Looking for 1-2 Semester/Master students<br />
: Contact: [[:User:Kgf | Frank K. Gurkaynak]]<br />
===Prerequisites===<br />
: VLSI I<br />
: VLSI II (''recommended'')<br />
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: Fall Semester 2014 (sem13h2)<br />
: Matthias Baer, Renzo Andri<br />
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===Character===<br />
: 20% Theory<br />
: 40% ASIC Design<br />
: 40% EDA tools<br />
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===Professor===<br />
: [http://www.iis.ee.ethz.ch/portrait/staff/lbenini.en.html Luca Benini]<br />
<!-- : [http://www.iis.ee.ethz.ch/portrait/staff/huang.en.html Qiuting Huang] ---><br />
<!-- : [http://lne.ee.ethz.ch/en/general-information/people/professor.html Vanessa Wood] ---><br />
<!-- : [http://www.iis.ee.ethz.ch/portrait/staff/mluisier.en.html Mathieu Luisier] ---><br />
<!-- : [http://www.iis.ee.ethz.ch/portrait/staff/schenk.en.html Andreas Schenk] ---><br />
<!-- : [http://www.dz.ee.ethz.ch/en/general-information/about/staff/uid/364.html Hubert Kaeslin] ---><br />
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[[#top|↑ top]]<br />
==Detailed Task Description==<br />
<br />
===Goals===<br />
===Practical Details===<br />
* '''[[Project Plan]]'''<br />
* '''[[Project Meetings]]'''<br />
* '''[[Design Review]]'''<br />
* '''[[Coding Guidelines]]'''<br />
* '''[[Final Report]]'''<br />
* '''[[Final Presentation]]'''<br />
<br />
==Results== <br />
<br />
==Links== <br />
[[Category:Digital]]<br />
[[Category:Available]]<br />
[[Category:Semester Thesis]]<br />
[[Category:UlpSoC]]<br />
<br />
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Kgf