Difference between revisions of "Adding Linux Support to our DMA engine (1-2S/B)"
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== Introduction == | == Introduction == | ||
| + | At IIS we are developing a modular and extensible high-performance direct memory access (DMA) engine. So far we have integrated it in our cluster-based systems. On those systems are programmed using bare-metal code to achieve the highest energy efficiency. | ||
| + | |||
| + | Next to the cluster-based systems, we are working on Ariane (CVA6), a 64 bit application-grade linux-capable core. | ||
| + | |||
| + | We are now planning to integrate our DMA engine in an Ariane-based SoC and evaluate its benefits in a Linux environment. | ||
== Project == | == Project == | ||
| + | We propose to divide the project in these steps: | ||
| + | * '''Research''': Investigate how Linux interacts with a system-level DMA and collect a set of minimal requirements for the hardware. | ||
| + | * '''RTL design''': Create a hardware interface for the DMA engine that features this set of minimal requirements Linux opposes on the hardware. | ||
| + | * '''Validation and driver development''': Create a driver for Linux allowing it to interface with the DMA; validate your hardware using simple transfers | ||
| + | * '''Evaluation''': Run complex applications to evaluate the performance of the DMA in this context. | ||
== Requirements == | == Requirements == | ||
| + | * Experience with digital design in SystemVerilog as taught in VLSI I | ||
== Composition == | == Composition == | ||
| − | + | * 30% studying the DMA interface imposed by Linux | |
| + | * 20% RTL design | ||
| + | * 30% driver development & validation | ||
| + | * 10% evaluation | ||
== Project Supervisors == | == Project Supervisors == | ||
Revision as of 17:23, 19 November 2021
Introduction
At IIS we are developing a modular and extensible high-performance direct memory access (DMA) engine. So far we have integrated it in our cluster-based systems. On those systems are programmed using bare-metal code to achieve the highest energy efficiency.
Next to the cluster-based systems, we are working on Ariane (CVA6), a 64 bit application-grade linux-capable core.
We are now planning to integrate our DMA engine in an Ariane-based SoC and evaluate its benefits in a Linux environment.
Project
We propose to divide the project in these steps:
- Research: Investigate how Linux interacts with a system-level DMA and collect a set of minimal requirements for the hardware.
- RTL design: Create a hardware interface for the DMA engine that features this set of minimal requirements Linux opposes on the hardware.
- Validation and driver development: Create a driver for Linux allowing it to interface with the DMA; validate your hardware using simple transfers
- Evaluation: Run complex applications to evaluate the performance of the DMA in this context.
Requirements
- Experience with digital design in SystemVerilog as taught in VLSI I
Composition
- 30% studying the DMA interface imposed by Linux
- 20% RTL design
- 30% driver development & validation
- 10% evaluation
