Difference between revisions of "Analog"
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==Completed Projects== | ==Completed Projects== | ||
These are projects that were completed in the last few years | These are projects that were completed in the last few years | ||
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| + | category = Completed | ||
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| + | category = 2015 | ||
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===2014=== | ===2014=== | ||
<DynamicPageList> | <DynamicPageList> | ||
Revision as of 19:41, 5 February 2015
Contents
Analog and Mixed Signal Design Group
The analog and mixed signal design group lead by Prof. Qiuting Huang specializes in the analysis, design and optimization of state-of-the-art integrated circuits for a broad range of applications such as wireless and wireline communications, high speed computing, sensor interfaces and smart power.
Available Projects
We are still looking for students/partners to work on the following projects
- Digital Control of a DC/DC Buck Converter
- High-Speed Digital-to-Analog Converter (DAC) for massive MIMO testing in 65nm CMOS
- High-Speed SAR ADC for next generation wireless communication in 12nm FinFET
- Analog building blocks for mmWave manipulation
- A mmWave Voltage-Controlled-Oscillator (VCO) for beyond 5G applications
- Bluetooth Low Energy network with optimized data throughput
- Event-Driven Convolutional Neural Network Modular Accelerator
- Level Crossing ADC For a Many Channels Neural Recording Interface
- 5G Cellular RF Front-end Design in 22nm CMOS Technology
- Design of Charge-Pump PLL in 22nm for 5G communication applications
Completed Projects
These are projects that were completed in the last few years
2015
No pages meet these criteria.
2014
No pages meet these criteria.
2013
- Wireless Biomedical Signal Acquisition Device
- Flexible Front-End Circuit for Biomedical Data Acquisition
- High-Resolution Large-Bandwidth Delta-Sigma A/D Converters in Ultra-Scaled CMOS
2012
- Data Mapping for Unreliable Memories
- Exploitation of Inherent Error Resilience of Wireless Systems under Unreliable Silicon
- High Throughput Turbo Decoder Design
- Turbo Decoder Design for High Code Rates
- Channel Decoding for TD-HSPA
- Near-Optimal Reduced-Complexity Sequence Detectors for TD-HSPA
- A Novel Constrained-Viterbi Algorithm with Linear Equalization and Grouping Assistance
- Successive Interference Cancellation for 3G Downlink
- Channel Estimation for TD-HSPA
- Evolved EDGE Physical Layer Incremental Redundancy Architecture
- MatPHY: An Open-Source Physical Layer Development Framework
- Interference Cancellation for Evolved EDGE on the RazorEDGE baseband ASIC
- Soft-Output Viterbi Equalizer as part of Evolved EDGE baseband ASIC
- High Performance Cellular Receivers in Very Advanced CMOS
- Multi-Band Receiver Design for LTE Mobile Communication
- High-Resolution, Calibrated Folding ADCs
