Analog building blocks for mmWave manipulation
While the fifth generation (5G) of wireless communication systems is being commercialized, research is currently being carried out on the next generation of wireless communication systems. To achieve higher data rate and due to spectrum congestion, the sixth generation (6G) is expected to operate at higher carrier frequencies, up to more than a 100GHz. For analog designers, this leads to several challenges, one of them being the generation of such frequencies with a jitter in the range of a few tens of femtoseconds while staying power efficient.
After having designed an oscillator operating at such frequencies, all the building blocks to manipulate mmWave clocks still need to be designed such that they do not add jitter while remaining power efficient. This project will explore circuits such as dividers, multipliers as well as clock distribution techniques at very-high frequencies in the Globalfoundries 22nm technology node.
- Analog Integrated Circuits (AIC)
- 20% Theory
- 80% Implementation