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Analog building blocks for mmWave manipulation

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Revision as of 14:44, 15 September 2021 by Guichemerre (talk | contribs) (Created page with "File:VCO2.png|400px|thumb|right|M. W. Mansha and M. M. Hella, "A 148-GHz Radiator Using a Coupled Loop Oscillator With a Quad-Feed Antenna in 22-nm FD-SOI," in IEEE Journal...")
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M. W. Mansha and M. M. Hella, "A 148-GHz Radiator Using a Coupled Loop Oscillator With a Quad-Feed Antenna in 22-nm FD-SOI," in IEEE Journal of Solid-State Circuits, May 2021

Short Description

While the fifth generation (5G) of wireless communication systems is being commercialized, research is currently being carried out on the next generation of wireless communication systems. To achieve higher data rate and due to spectrum congestion, the sixth generation (6G) is expected to operate at higher carrier frequencies, up to more than a 100GHz. For analog designers, this leads to several challenges, one of them being the generation of such frequencies with a jitter in the range of a few tens of femtoseconds while staying power efficient.

After having designed an oscillator operating at such frequencies, all the building blocks to manipulate mmWave clocks still need to be designed such that they do not add jitter while remaining power efficient. This project will explore circuits such as dividers, multipliers as well as clock distribution techniques at very-high frequencies in the Globalfoundries 22nm technology node.


Status: Available

Type: Bachelor Thesis, Semester project or Master Thesis
Contact: Jérémy Guichemerre, Thomas Burger

Prerequisites

Analog Integrated Circuits (AIC)

Character

20% Theory
80% Implementation


Professor

Mathieu Luisier

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Detailed Task Description

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