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Difference between revisions of "Benjamin Weber"

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==Available Projects==
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==Short Bio==
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Benjamin Weber received his BSc and MSc in Electrical Engineering and
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Information Technology from the Swiss Federal Institute of Technology
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(ETH) in August 2010 and in June 2012, respectively. In 2017 he completed
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his PhD thesis entitled "An Evolved EDGE System on Chip for the Cellular
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Internet of Things" at the Department of Information Technology and
== Projects in Progress==
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Electrical Engineering (D-ITET) at ETH, more particularly, at the
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Integrated Systems Laboratory (IIS). The thesis was defended successfully
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and he received his PhD in November 2018. For more details see [https://www.linkedin.com/in/benjamin-weber-2300b0169/ Benjamin Weber's LinkedIn profile].
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category = Weberbe
 
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==Completed Projects==
 
==Completed Projects==
 
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category = Weberbe
 
category = Weberbe
 
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==Contact Information==
 
* '''Office''': ETZ J71.2
 
* '''e-mail''': [mailto:weberbe@iis.ee.ethz.ch weberbe@iis.ee.ethz.ch]
 
* '''phone''': +41 44 632 4491
 
  
 
[[Category:Analog]]
 
[[Category:Analog]]
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[[Category:FPGA]]
 
[[Category:FPGA]]
 
[[Category:ASIC]]
 
[[Category:ASIC]]
[[Category:Audio]]
 
[[Category:Software]]
 
[[Category:Supervisors]]
 

Latest revision as of 16:17, 30 November 2021

Short Bio

Benjamin Weber received his BSc and MSc in Electrical Engineering and Information Technology from the Swiss Federal Institute of Technology (ETH) in August 2010 and in June 2012, respectively. In 2017 he completed his PhD thesis entitled "An Evolved EDGE System on Chip for the Cellular Internet of Things" at the Department of Information Technology and Electrical Engineering (D-ITET) at ETH, more particularly, at the Integrated Systems Laboratory (IIS). The thesis was defended successfully and he received his PhD in November 2018. For more details see Benjamin Weber's LinkedIn profile.

Completed Projects