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Benjamin Weber received his BSc and MSc in Electrical Engineering and
 
Benjamin Weber received his BSc and MSc in Electrical Engineering and
 
Information Technology from the Swiss Federal Institute of Technology
 
Information Technology from the Swiss Federal Institute of Technology
(ETH) in August 2010 and in June 2012, respectively. Currently, he is a
+
(ETH) in August 2010 and in June 2012, respectively. In 2017 he completed
PhD student at the Department of Information Technology and Electrical
+
his PhD thesis entitled "An Evolved EDGE System on Chip for the Cellular
Engineering (D-ITET) at ETH, more particularly, at the Integrated Systems
+
Internet of Things" at the Department of Information Technology and
Laboratory (IIS). His research interests include low-power physical layer
+
Electrical Engineering (D-ITET) at ETH, more particularly, at the
architectures, open-source protocol stacks, and cross-layer optimization
+
Integrated Systems Laboratory (IIS). The thesis was defended successfully
for Machine-to-Machine (M2M) and Internet-of-Things (IoT) type cellular
+
and he received his PhD in November 2018. For more details see [https://www.linkedin.com/in/benjamin-weber-2300b0169/ Benjamin Weber's LinkedIn profile].
communications.
 
  
==Available Projects==
 
<DynamicPageList>
 
category = Available
 
category = Weberbe
 
</DynamicPageList>
 
== Projects in Progress==
 
<DynamicPageList>
 
category = In progress
 
category = Weberbe
 
</DynamicPageList>
 
 
==Completed Projects==
 
==Completed Projects==
 
<DynamicPageList>
 
<DynamicPageList>
 +
supresserrors = true
 
category = Completed
 
category = Completed
 
category = Weberbe
 
category = Weberbe
 
</DynamicPageList>
 
</DynamicPageList>
==Publications==
 
* Benjamin Weber, Harald Kröll, Christian Benkeser, and Qiuting Huang. On the Mapping of Incremental Redundancy into a Physical Layer ASIC. ''Journal of Signal Processing Systems'', 78(3):299–312, October 2014.
 
 
* Harald Kröll, Stefan Zwicky, Benjamin Weber, Christoph Roth, Christian Benkeser, Andreas Burg, and Qiuting Huang. An Evolved EDGE PHY ASIC Supporting Soft-Output Equalization and Rx Diversity. In ''IEEE 40th European Solic-State Circuits Conference (ESSCIRC)'', Venice, Italy, September 2014.
 
 
* Stefan Zwicky, Harald Kröll, Benjamin Weber, and Qiuting Huang. Prototyping Platform for Evolved EDGE ASICs. In ''Workshop on Testbeds and Prototypes for Applied Research in Communications (WTPARC)'', Bern, Switzerland, March 2014.
 
 
* Benjamin Weber, Harald Kröll, Christian Benkeser, and Qiuting Huang. An Efficient Incremental Redundancy Implementation for 2.75G Evolved EDGE. In ''2013 Wireless Innovation Forum European Conference on Communications Technologies and Software Defined Radio (SDR-WInnComm-Europe 2013)'', pages 21–26, Munich, Germany, June 2013.
 
 
* Harald Kröll, Stefan Zwicky, Benjamin Weber, Christian Benkeser, and Qiuting Huang. Physical Layer Development Framework for OsmocomBB. ''Journal of Signal Processing Systems'', 73(3):301–314, May 2013.
 
 
* Harald Kröll, Christian Benkeser, Stefan Zwicky, Benjamin Weber, and Qiuting Huang. Baseband Signal Processing Framework for the OsmocomBB GSM Protocol Stack. In ''2012 Wireless Innovation Forum European Conference on Communications Technologies and Software Defined Radio (SDR’12 - WInnComm - Europe)'', pages 127–132, Brussels, Belgium, June 2012.
 
 
==Contact Information==
 
* '''Office''': ETZ J71.2
 
* '''e-mail''': [mailto:weberbe@iis.ee.ethz.ch weberbe@iis.ee.ethz.ch]
 
* '''phone''': +41 44 632 4491
 
  
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[[Category:Analog]]
 
[[Category:Digital]]
 
[[Category:Digital]]
 
[[Category:Telecommunications]]
 
[[Category:Telecommunications]]
 
[[Category:FPGA]]
 
[[Category:FPGA]]
 
[[Category:ASIC]]
 
[[Category:ASIC]]
[[Category:Supervisors]]
 

Latest revision as of 16:17, 30 November 2021

Short Bio

Benjamin Weber received his BSc and MSc in Electrical Engineering and Information Technology from the Swiss Federal Institute of Technology (ETH) in August 2010 and in June 2012, respectively. In 2017 he completed his PhD thesis entitled "An Evolved EDGE System on Chip for the Cellular Internet of Things" at the Department of Information Technology and Electrical Engineering (D-ITET) at ETH, more particularly, at the Integrated Systems Laboratory (IIS). The thesis was defended successfully and he received his PhD in November 2018. For more details see Benjamin Weber's LinkedIn profile.

Completed Projects