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Difference between revisions of "Benjamin Weber"

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Benjamin Weber received his BSc and MSc in Electrical Engineering and
 
Benjamin Weber received his BSc and MSc in Electrical Engineering and
 
Information Technology from the Swiss Federal Institute of Technology
 
Information Technology from the Swiss Federal Institute of Technology
(ETH) in August 2010 and in June 2012, respectively. Currently, he is a
+
(ETH) in August 2010 and in June 2012, respectively. In 2017 he completed
PhD student at the Department of Information Technology and Electrical
+
his PhD thesis entitled "An Evolved EDGE System on Chip for the Cellular
Engineering (D-ITET) at ETH, more particularly, at the Integrated Systems
+
Internet of Things" at the Department of Information Technology and
Laboratory (IIS). His research interests include low-power physical layer
+
Electrical Engineering (D-ITET) at ETH, more particularly, at the
architectures, open-source protocol stacks, and cross-layer optimization
+
Integrated Systems Laboratory (IIS). The thesis was defended successfully
for Machine-to-Machine (M2M) and Internet-of-Things (IoT) type cellular
+
and he received his PhD in November 2018. For more details see [https://www.linkedin.com/in/benjamin-weber-2300b0169/ Benjamin Weber's LinkedIn profile].
communications.
 
 
 
==Available Projects==
 
<DynamicPageList>
 
category = Available
 
category = Weberbe
 
</DynamicPageList>
 
 
 
== Projects in Progress==
 
<DynamicPageList>
 
category = In progress
 
category = Weberbe
 
</DynamicPageList>
 
  
 
==Completed Projects==
 
==Completed Projects==
 
<DynamicPageList>
 
<DynamicPageList>
 +
supresserrors = true
 
category = Completed
 
category = Completed
 
category = Weberbe
 
category = Weberbe
 
</DynamicPageList>
 
</DynamicPageList>
  
 
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[[Category:Analog]]
==Contact Information==
+
[[Category:Digital]]
* '''Office''': ETZ J71.2
+
[[Category:Telecommunications]]
* '''e-mail''': [mailto:weberbe@iis.ee.ethz.ch weberbe@iis.ee.ethz.ch]
+
[[Category:FPGA]]
* '''phone''': +41 44 632 4491
+
[[Category:ASIC]]
 
 
[[Category:Supervisors]]
 

Latest revision as of 16:17, 30 November 2021

Short Bio

Benjamin Weber received his BSc and MSc in Electrical Engineering and Information Technology from the Swiss Federal Institute of Technology (ETH) in August 2010 and in June 2012, respectively. In 2017 he completed his PhD thesis entitled "An Evolved EDGE System on Chip for the Cellular Internet of Things" at the Department of Information Technology and Electrical Engineering (D-ITET) at ETH, more particularly, at the Integrated Systems Laboratory (IIS). The thesis was defended successfully and he received his PhD in November 2018. For more details see Benjamin Weber's LinkedIn profile.

Completed Projects