Difference between revisions of "Benjamin Weber"
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Revision as of 19:19, 5 February 2015
Benjamin Weber received his BSc and MSc in Electrical Engineering and Information Technology from the Swiss Federal Institute of Technology (ETH) in August 2010 and in June 2012, respectively. Currently, he is a PhD student at the Department of Information Technology and Electrical Engineering (D-ITET) at ETH, more particularly, at the Integrated Systems Laboratory (IIS). His research interests include low-power physical layer architectures, open-source protocol stacks, and cross-layer optimization for Machine-to-Machine (M2M) and Internet-of-Things (IoT) type cellular communications.
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Projects in Progress
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- Interference Cancellation for EC-GSM-IoT
- Sub Noise Floor Channel Estimation for the Cellular Internet of Things
- Internet of Things SoC Characterization
- VLSI Implementation of a Low-Complexity Channel Shortener for 2G EC-GSM-IoT and Evolved EDGE
- Internet of Things Network Synchronizer
- WCDMA/HSPA+ Synchronization System Design, Implementation, and Testing
- System Analysis and VLSI Design of NB-IoT Baseband Processing
- Digital Transmitter for Mobile Communications
- FPGA-Based Digital Frontend for 3G Receivers
- EvaLTE: A 2G/3G/4G Cellular Transceiver FMC
- Synchronisation and Cyclic Prefix Handling For LTE Testbed
- An FPGA-Based Testbed for 3G Mobile Communications Receivers
- Reading The GSM Beacon Carrier with OsmocomBB and stoneEDGE
- Baseband Meets CPU
- StoneEDGE: An EC-GSM-IoT and Evolved EDGE PHY ASIC
- EvalEDGE: A 2G Cellular Transceiver FMC
- RazorEDGE: An Evolved EDGE DBB ASIC
- Design and VLSI Implementation of a Constrained-Viterbi Algorithm Equalizer for 3GPP TD-HSPA
- Time and Frequency Synchronization in LTE Cat-0 Devices
- Evolved EDGE Physical Layer Incremental Redundancy Architecture
- MatPHY: An Open-Source Physical Layer Development Framework
- Benjamin Weber, Harald Kröll, Christian Benkeser, and Qiuting Huang. On the Mapping of Incremental Redundancy into a Physical Layer ASIC. Journal of Signal Processing Systems, pages 1–14, October 2014.
- Harald Kröll, Stefan Zwicky, Benjamin Weber, Christoph Roth, Christian Benkeser, Andreas Burg, and Qiuting Huang. An Evolved EDGE PHY ASIC Supporting Soft-Output Equalization and Rx Diversity. In IEEE 40th European Solic-State Circuits Conference (ESSCIRC), Venice, Italy, September 2014.
- Stefan Zwicky, Harald Kröll, Benjamin Weber, and Qiuting Huang. Prototyping Platform for Evolved EDGE ASICs. In Workshop on Testbeds and Prototypes for Applied Research in Communications (WTPARC), Bern, Switzerland, March 2014.
- Benjamin Weber, Harald Kröll, Christian Benkeser, and Qiuting Huang. An Efficient Incremental Redundancy Implementation for 2.75G Evolved EDGE. In 2013 Wireless Innovation Forum European Conference on Communications Technologies and Software Defined Radio (SDR-WInnComm-Europe 2013), pages 21–26, Munich, Germany, June 2013.
- Harald Kröll, Stefan Zwicky, Benjamin Weber, Christian Benkeser, and Qiuting Huang. Physical Layer Development Framework for OsmocomBB. Journal of Signal Processing Systems, 73(3):301–314, May 2013.
- Harald Kröll, Christian Benkeser, Stefan Zwicky, Benjamin Weber, and Qiuting Huang. Baseband Signal Processing Framework for the OsmocomBB GSM Protocol Stack. In 2012 Wireless Innovation Forum European Conference on Communications Technologies and Software Defined Radio (SDR’12 - WInnComm - Europe), pages 127–132, Brussels, Belgium, June 2012.
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