Difference between revisions of "Big Data Analytics Benchmarks for Ara"
From iis-projects
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[[Category:Available]] | [[Category:Available]] | ||
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| − | === Introduction | + | == Status: Available == |
| + | |||
| + | * Professor: Prof. Dr. L. Benini | ||
| + | * Supervisors: | ||
| + | ** [[:User:Chizhang | Chi Zhang]]: [mailto:chizhang@iis.ee.ethz.ch] | ||
| + | ** [[:User:Mperotti | Matteo Perotti]]: [mailto:mperotti@iis.ee.ethz.ch] | ||
| + | |||
| + | == Introduction == | ||
Ara | Ara | ||
big data analytics | big data analytics | ||
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| − | + | == Tasks == | |
* Familiarize yourself with vector processor Ara | * Familiarize yourself with vector processor Ara | ||
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| − | + | == Requirements == | |
* Strong interest and basic knowledge in computer architecture and operating systems, both on the HW and SW sides | * Strong interest and basic knowledge in computer architecture and operating systems, both on the HW and SW sides | ||
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* Bonus: being familiar with vector processors, RISC-V RVV | * Bonus: being familiar with vector processors, RISC-V RVV | ||
| − | + | == Character == | |
* 25% Literature / Architecture review | * 25% Literature / Architecture review | ||
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* 25% Performance evaluation | * 25% Performance evaluation | ||
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== References == | == References == | ||
Revision as of 16:47, 6 November 2022
Status: Available
- Professor: Prof. Dr. L. Benini
- Supervisors:
Introduction
Ara big data analytics Ara lack these benchmarks goal:
Tasks
- Familiarize yourself with vector processor Ara
- Try to run Ara RTL simulation
- Executing existing benchmarks
- Understand how vector processor works and the chaining techneque
- Familiarize yourself with a bunch of popular big data analytics worksloads, including:
- Naive Bayes
- SVM
- K-means clustering
- Breadth-first search
- Depth-first search
- Multilayer perceptron,
- Graph neural network
- Coding for big data analytics benchmarks for Ara, while think about:
- How to vectorize these workloads
- How to schedule memory access and computation to make best advantage of vector chaining and reach to high function unit utilization
- Evaluating big data analytics benchmarks
- Run you benchmarks on Ara and count performance metrics, function unit utilization, bandwidth, bus utilization, etc.
- Make roofline model, while varing data set size and Ara lane counts
- Write a report and prepare a presentation.
- Possible BONUS goals.
Requirements
- Strong interest and basic knowledge in computer architecture and operating systems, both on the HW and SW sides
- Experience with SystemVerilog HDL, such as taught in VLSI I
- Knowledge of bare-metal C and assembly programming
- Bonus: being familiar with vector processors, RISC-V RVV
Character
- 25% Literature / Architecture review
- 50% Bare-metal C and Assembly programming
- 25% Performance evaluation
References
[1] Ara: https://arxiv.org/pdf/1906.00478.pdf
[2] Ara source code: https://github.com/pulp-platform/ara
[3] RVV: https://github.com/riscv/riscv-v-spec/releases/tag/v1.0
[4] Big data analytics: https://journalofbigdata.springeropen.com/articles/10.1186/s40537-015-0030-3
[5] How AI and ML Applications Will Benefit from Vector Processing: https://www.enterpriseai.news/2020/07/31/how-ai-and-ml-applications-will-benefit-from-vector-processing/
[6] A survey on platforms for big data analytics: https://link.springer.com/article/10.1186/s40537-014-0008-6
