Bluetooth Low Energy receiver in 65nm CMOS
With the advent of the Internet of Things (IoT), it is expected that the amount of objects capable of Bluetooth Low Energy (BLE) communication will rise exponentially in the upcoming years. Therefore, the design of power efficient BLE transmitter and receiver is crucial to enable them to be embedded in low-power nodes.
We are looking for students (Semester or Bachelor thesis) to take part in our on-going design of a BLE receiver. The project could either be focused on an analog part of the chain or on the design and implementation of the digital algorithm that compensate for offsets and then decodes. Many blocks are still to be designed (for example an Automatic Gain Control, AGC) so don’t hesitate to contact us so we can discuss about what you want to do and what is still available!
- Type: Bachelor's Thesis or Semester Project for 1-2 student(s)
- Contact: Jérémy Guichemerre, Thomas Burger
- Analog Integrated Circuits (AIC) for an analog project
- VLSI I for a digital project
- 20% Theory
- 40% Algorithm design / Simulation
- 40% Implementation