Category:Completed

These projects have already been completed. You can take a look at the results of the project and learn more.

Digital

2015

• Hardware Accelerated Derivative Pricing
• Glitches Reduce Listening Time of Your iPod
• FFT-based Convolutional Network Accelerator
• Real-Time Optical Flow Using Neural Networks
• EvaLTE: A 2G/3G/4G Cellular Transceiver FMC
• Synchronisation and Cyclic Prefix Handling For LTE Testbed
• An FPGA-Based Testbed for 3G Mobile Communications Receivers
• Reading The GSM Beacon Carrier with OsmocomBB and stoneEDGE
• Baseband Meets CPU
• Active-Set QP Solver on FPGA
• Vector Processor for In-Memory Computing
• StoneEDGE: An EC-GSM-IoT and Evolved EDGE PHY ASIC
• Hardware/software co-programming on the Parallella platform
• Design and VLSI Implementation of a Constrained-Viterbi Algorithm Equalizer for 3GPP TD-HSPA
• Time and Frequency Synchronization in LTE Cat-0 Devices
• Real-Time Stereo to Multiview Conversion

2014

• EvalEDGE: A 2G Cellular Transceiver FMC
• Real-Time Stereo to Multiview Conversion
• Design and Implementation of a Convolutional Neural Network Accelerator ASIC
• Design and Implementation of an Approximate Floating Point Unit

2013

• RazorEDGE: An Evolved EDGE DBB ASIC
• Real-Time Stereo to Multiview Conversion
• NORX - an AEAD algorithm for the CAESAR competition
• A Unified-Multiplier Based Hardware Architecture for Elliptic Curve Cryptography
• SHAre - An application Specific Instruction Set Processor for SHA-2/3
• Quantum Key Secured 100 Gbit/s Payload Encryption and its High-Speed Network Interfaces
• Feature Extraction with Binarized Descriptors: ASIC Implementation and FPGA Environment
• Real-time View Synthesis using Image Domain Warping
• Ultra-low power processor design

Nano TCAD

2013

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