Difference between revisions of "Category:FPGA"
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Latest revision as of 19:51, 10 February 2015
Redirect to:
Pages in category "FPGA"
The following 100 pages are in this category, out of 100 total.
A
- A Flexible FPGA-Based Peripheral Platform Extending Linux-Capable Systems on Chip (1-3S/B)
- A Flexible Peripheral System for High-Performance Systems on Chip (M)
- A Snitch-based Compute Accelerator for HERO (M/1-2S)
- A Snitch-Based SoC on iCE40 FPGAs (1-2S/B)
- Accelerator for Boosted Binary Features
- Accelerator for Spatio-Temporal Video Filtering
- Active-Set QP Solver on FPGA
- Advanced 5G Repetition Combining
- An FPGA-Based Evaluation Platform for Mobile Communications
- An FPGA-Based Testbed for 3G Mobile Communications Receivers
- ASIC Development of 5G-NR LDPC Decoder
- Autoencoder Accelerator for On-Chip Semi-Supervised Learning
B
C
- Cell Measurements for the 5G Internet of Things
- Channel Estimation for 5G Cellular IoT and Fast Fading Channels
- Compressed Sensing for Wireless Biosignal Monitoring
- Compressed Sensing vs JPEG
- Compression of Ultrasound data on FPGA
- Convolution Neural Networks on our Ultra-Low Power Mult-Core Plattform PULP
D
E
F
H
- Harald Kröll
- Hardware Accelerated Derivative Pricing
- Hardware Accelerator for Model Predictive Controller
- HERO: TLB Invalidation
- High Speed FPGA Trigger Logic for Particle Physics Experiments
- High-speed Scene Labeling on FPGA
- High-Throughput Hardware Implementations of Authenticated Encryption Algorithms
- Human Intranet
I
- Ibex: FPGA Optimizations
- Image and Video Processing
- Implementation of a NB-IoT Positioning System
- Improved Reacquisition for the 5G Cellular IoT
- Indoor Positioning with Bluetooth
- Interfacing PULP with a Brain-Inspired Ultra-Low Power Spiking Cochlea
- Internet of Things Network Synchronizer
- IoT Turbo Decoder
L
- LAPACK/BLAS for FPGA
- LightProbe - 192cha Multiplexer Stage (Rigid-Flex-PCB Project)
- LightProbe - 200G Remote DMA for GPU FPGA Data Transfers
- LightProbe - CNN-Based-Image-Reconstruction
- LightProbe - Design of a High-Speed Optical Link
- LightProbe - Frontend Firmware and Control Side Channel
- LightProbe - Thermal-Power aware on-head Beamforming
- LLVM and DaCe for Snitch (1-2S)
- LTE IoT Network Synchronization
M
P
- Physics is looking for PULP
- Precise Ultra-low-power Timer
- PULPonFPGA: Hardware L2 Cache
- PULPonFPGA: Lightweight Virtual Memory Support - Coherency Extensions
- PULPonFPGA: Lightweight Virtual Memory Support - Multi-Level TLB
- PULPonFPGA: Lightweight Virtual Memory Support - Page Table Walker
- PULPonFPGA: Lightweight Virtual Memory Support - Physically Contiguous Memory
- PULPonFPGA: Lightweight Virtual Memory Support - Software Cache
R
S
- Sandro Belfanti
- Shared Correlation Accelerator for an RF SoC
- Smart Virtual Memory Sharing
- Spatio-Temporal Video Filtering
- Stefan Lippuner
- Sub-Noise Floor Channel Tracking
- User:Susman
- Synchronisation and Cyclic Prefix Handling For LTE Testbed
- System Analysis and VLSI Design of NB-IoT Baseband Processing
