View source for Creating A Technology-independent USB1.0 Host Implementation Targetting ASICSs (1-3S/B)

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[[Category:Digital]]
[[Category:ASIC]]
[[Category:High Performance SoCs]]
[[Category:Computer Architecture]]
[[Category:2023]]
[[Category:Semester Thesis]]
[[Category:Bachelor Thesis]]
[[Category:Tbenz]]
[[Category:Cykoenig]]
[[Category:In progress]]


= Overview =

== Status: Available ==

* Type: ASIC Bachelor / Semester Thesis
* Professor: Prof. Dr. L. Benini
* Supervisors:
** [[:User:Tbenz | Thomas Benz]]: [mailto:tbenz@iis.ee.ethz.ch tbenz@iis.ee.ethz.ch]
** [[:User:Cykoenig | Cyril Koenig]]: [mailto:cykoenig@iis.ee.ethz.ch tbenz@iis.ee.ethz.ch]

= Introduction =
At IIS we are moving towards Linux-capable SoCs taped ou on ASICs. A wide range of peripheral devices is almost a necessity when working with Linux-capable ASICs (e.g. Mouse, Keyboard, Sound, ...). 
Implementing a silicon-proven IP for each peripheral type is quite a burden and requires a lot of effort. A simple solution to this problem was introduced in 1996 with USB 1.0. 

= Project =
You will implement a USB 1.0/1.1 host device implementable both on ASICs and FPGAs (the latter mainly for verification).


== Character ==

* 20% Study the USB protocol and investigate existing solutions
* 40% Design, implementation, and verification of the controller
* 40% Evaluation and optimization of your implementation on FPGAs / in the Cheshire SoC, creation of constraints.

== Prerequisites ==

* Interest in memory systems
* Experience with digital design in SystemVerilog as taught in VLSI I
* Preferred: Visited VLSI II or an equivalent lecture

= References =