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Difference between revisions of "DC-DC Buck converter in 65nm CMOS"

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[[Category:Analog IC Design]]
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Revision as of 11:32, 20 August 2021

Schematic view of a synchronous buck converter (Priewasser, R., Agostinelli, M., Unterrieder, C., Marsili, S., & Huemer, M. (2013). Modeling, control, and implementation of DC–DC converters for variable frequency operation. IEEE transactions on power electronics, 29(1), 287-301.)

Short Description

Power management is a fundamental block in integrated circuits, especially for battery-operated systems such as the Magnetic Resonance Imaging transceiver which requires this DC-DC converter. A buck converter (also called step-down converter) is a DC-DC power converter which takes an input voltage and reduce it to a lower one. After the LDO having reduced the voltage from the battery to a stable lower voltage, the DC-DC needs to reduce this voltage even more to supply most of the building blocks of the MRI transceiver. The goal of this project is to maximize the conversion efficiency of the DC-DC and minimize its output ripple voltage in order to obtain a stable supply.

At the Integrated Systems Laboratory, we have designed similar circuits in an older technology. This circuit will have to be designed in 65nm CMOS and can be reused in the future for other projects.

Status: Completed

Type: Bachelor's Thesis or Semester Project
Contact: Guillaume Mocquard, Thomas Burger


Analog Integrated Circuits (AIC)


30% Theory
70% Circuit Design


Qiuting Huang

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Detailed Task Description


Practical Details



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