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DMA Streaming Co-processor

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a) 5- and 9-stencil arrangements, b) resulting matrix structure for least-squares problems.

Short Description

Linear solvers can be used in many image and video processing applications, e.g. for optical-flow calculation or image domain warping (IDW). In a recent publication we estimated the area, throughput and power consumption for different solver implementations, and we would now like to verify some of these estimated results using post-layout simulations and ASIC measurements. Besides the verification of these results, we are interested in how well estimation methods at various levels (pre-RTL estimations, gate-level simulations, post-layout simulations) actually match with the measurements of a fabricated ASIC.

Status: Available

Scope: Semester or Master Thesis
Looking for 1-2 Interested Students
Supervisors: Frank Gürkaynak, Michael Schaffner


Basic Linear Algebra Course
Matlab, VHDL and C++


25% Theory & Literature Study
25% Evaluations
50% Hw Architecture & ASIC Implementation


Luca Benini


Disney Research Zurich

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Detailed Task Description


Practical Details

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