Personal tools

Difference between revisions of "Data Interface: SPI to PC Bridge for ASICs"

From iis-projects

Jump to: navigation, search
Line 55: Line 55:

Latest revision as of 16:55, 12 July 2022

Brunn fast interface.png

Short Description

Our mixed signal ICs generate a lot of data which needs to be read out and stored to a memory or streamed out to a PC for testing, debugging and in our applications in the field. Up to now, simple serial-to-USB (UART) for streaming and mass storage (with FAT32) on a SDCard as memory has been used. For smaller power budget, system size and higher throughput reasons we want to leave these limiting technologies behind and switch to faster and simpler ways. This is where this thesis starts. The aim is a hardware and software system that combines streaming live data from our ASICs to a PC and reading out memory with a UI (also on a PC). An evaluation of different approaches has to be made (Ethernet, USB, ...) and the agreed upon approach has then to be implemented. The project reaches from evaluation, PCB design, embedded software design up to PC software implementation. Creativity and a high level of dedication is expected as it is an extensive but interesting project.


Various SPI to Ethernet modules/ICs can be found but are limited in speed and stack capabilities. An approach for faster data transfer over Ethernet must be found. Ideas are to use a host MCU which runs the TCP/IP and/or the UDP stack and offers a fast SPI interface. Or, better yet, a small FPGA to provide a QSPI slave interface. An on-fabric MCU could be used to handle the stack.

Status: Available

Looking for 1-2 Semester Thesis/Group Work students
Contact: Noé Brun


Experience with hardware design and embedded software


10% Concept & Verification
30% Hardware PCB Design
60% Software


Qiuting Huang

↑ top

Detailed Task Description


Practical Details