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The basic principle of ultrasound imaging is to excite the target body with high-frequency acoustic pulses and to form an image using the back-reflected echoes. The reconstruction of the image based on these echoes is called beamforming and for today's 2D transducer heads with several thousand transducer elements, it is definitely the computationally most intensive operation. In order to allow for portable 3D ultrasound systems, new algorithms and hardware architectures for digital beamforming are currently being developed at IIS.   
 
The basic principle of ultrasound imaging is to excite the target body with high-frequency acoustic pulses and to form an image using the back-reflected echoes. The reconstruction of the image based on these echoes is called beamforming and for today's 2D transducer heads with several thousand transducer elements, it is definitely the computationally most intensive operation. In order to allow for portable 3D ultrasound systems, new algorithms and hardware architectures for digital beamforming are currently being developed at IIS.   
  
The goal of this semester project is the optimization and ASIC implementation of a single or a few processing channels of a high-channel-count beamformer for 3D ultrasound imaging. In order to do an accurate design feasibility study of the complete beamformer architecture, the fabricated ASIC is tested, measured and physically characterized in a second phase.
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The goal of this semester project is the optimization and ASIC implementation of a few processing channels of a beamformer for ultrasound imaging. In order to do an accurate design feasibility study of the complete beamformer architecture, the fabricated ASIC is tested, measured and physically characterized in a second phase.  
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Alternatively, depending on the students interest, an FPGA implementation is also possible.
 +
 
 +
Depending on the choosen platform (ASIC/FPGA) the work either targets ...
 +
: ... a high-frame rate (>1000Hz) synthetic aperture beamformer (FPGA)
 +
: ... a low-power software configurable 2D receive beamformer (ASIC)
 +
 
  
 
This project is sponsored by [[:Category:UltrasoundToGo|UltrasoundToGo Nano-Tera Project]]
 
This project is sponsored by [[:Category:UltrasoundToGo|UltrasoundToGo Nano-Tera Project]]
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===Status: Available ===
 
===Status: Available ===
 
: Looking for Interested Students
 
: Looking for Interested Students
: Supervision: [[:User:vogelpi|Pirmin Vogel]], [[:User:Phager|Pascal Hager]]
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: Supervision: [[:User:Phager|Pascal Hager]], [[:User:vogelpi|Pirmin Vogel]]
  
 
===Character===
 
===Character===
: 30% Theory, Algorithms and Simulation
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: 20% Theory, Algorithms and Simulation
 
: 40% VHDL
 
: 40% VHDL
: 30% ASIC Design
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: 40% ASIC/FPGA Design
  
 
===Prerequisites===
 
===Prerequisites===
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[[#top|↑ top]]
 
[[#top|↑ top]]
 
[[Category:Digital]]
 
[[Category:Digital]]
[[Category:Available]]
 
 
[[Category:Semester Thesis]]
 
[[Category:Semester Thesis]]
 
[[Category:UltrasoundToGo]]
 
[[Category:UltrasoundToGo]]
 
[[Category:ASIC]]
 
[[Category:ASIC]]
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[[Category:FPGA]]
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[[Category:Vogelpi]]
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[[Category:Phager]]
  
 
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Latest revision as of 10:23, 10 November 2017

Bulky state-of-the-art 3D ultrasound system.jpeg

Short Description

Ultrasound imaging is an important biomedical technique for analyzing soft tissues in the human body, with both diagnostic and therapeutic applications. IIS is involved in a project developing a high-performance, portable 3D ultrasound platform.

The basic principle of ultrasound imaging is to excite the target body with high-frequency acoustic pulses and to form an image using the back-reflected echoes. The reconstruction of the image based on these echoes is called beamforming and for today's 2D transducer heads with several thousand transducer elements, it is definitely the computationally most intensive operation. In order to allow for portable 3D ultrasound systems, new algorithms and hardware architectures for digital beamforming are currently being developed at IIS.

The goal of this semester project is the optimization and ASIC implementation of a few processing channels of a beamformer for ultrasound imaging. In order to do an accurate design feasibility study of the complete beamformer architecture, the fabricated ASIC is tested, measured and physically characterized in a second phase.

Alternatively, depending on the students interest, an FPGA implementation is also possible.

Depending on the choosen platform (ASIC/FPGA) the work either targets ...

... a high-frame rate (>1000Hz) synthetic aperture beamformer (FPGA)
... a low-power software configurable 2D receive beamformer (ASIC)


This project is sponsored by UltrasoundToGo Nano-Tera Project

Status: Available

Looking for Interested Students
Supervision: Pascal Hager, Pirmin Vogel

Character

20% Theory, Algorithms and Simulation
40% VHDL
40% ASIC/FPGA Design

Prerequisites

VLSI I
Matlab, VHDL

Professor

Luca Benini

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