FFT HDL Code Generator for Multi-Antenna mmWave Communication
The millimeter wave (mmWave) spectrum (30 GHz to 300 GHz) provides vast amounts of unused frequency bands available for high-bandwidth wireless communication and is widely believed to be a key enabler in beyond 5G (B5G) standards. Unfortunately, electromagnetic waves at such high frequencies suffer from strong attenuation, mainly due to atmospheric absorption. A prominent solution to deal with the attenuation at mmWave frequencies is to use a large number of antennas in the receiver and the transmitter combined with beamforming, an emerging technique known as massive multiple-input multiple-output (MIMO). However, the practical deployment of massive MIMO at mmWave faces challenges in terms of implementation costs and power consumption.
The discrete Fourier transform (DFT) is one of the key digital signal processing tasks in virtually all communication systems and contributes significantly to the cost and power consumption of the digital circuitry in mmWave communication systems due to the extremely high rates such transforms need to be calculated. In the past decades, there has been extensive research on efficient implementations of DFT using the fast Fourier transform (FFT) algorithm. However, only a handful of open-source hardware designs for FFTs exist that provide fine-grained control of the underlying design parameters and are suitable for mmWave wireless systems. Furthermore, mmWave operation leads to new design trade-offs between different FFT architectures that have not been explored in the literature but have the potential to substantially reduce power consumption and implementation costs (in silicon area).
The goals of this project are (i) the design of a novel streaming FFT architectures which provides control over the key design parameters and (ii) the development of software scripts that automatically generates RTL design in HDL. These architectures will then be used to explore the fundamental design trade-offs and identify best practices for mmWave communication systems. The most promising FFT architecture will be integrated in an ASIC for mmWave massive MIMO communication systems.
- Looking for 1-2 Semester/Master students
- Contact: Seyed Hadi Mirfarshbafan
- Matlab or Python
- Verilog or VHDL
- VLSI II
- 30% Literature research
- 50% Verilog or VHDL implementation
- 20% ASIC design flow