Personal tools

Difference between revisions of "FPGA-based Implementation of a Novel Cell-Search Algorithm for Mobile Communications"

From iis-projects

Jump to: navigation, search
 
(One intermediate revision by the same user not shown)
Line 5: Line 5:
 
To this end, the student will study and port the Matlab implementation of the algorithm to VHDL in order to implement the new technique on a powerful state-of-the-art FPGA board. After testing and verifying the hardware implementation, the VHDL code will be integrated with the rest of the already-implemented chip solution; thereby completing the whole baseband receiver chain.
 
To this end, the student will study and port the Matlab implementation of the algorithm to VHDL in order to implement the new technique on a powerful state-of-the-art FPGA board. After testing and verifying the hardware implementation, the VHDL code will be integrated with the rest of the already-implemented chip solution; thereby completing the whole baseband receiver chain.
  
===Status: Available ===
+
===Status: Obsolete ===
: Suitable for a Semester project or a Master thesis
+
: Contact: [[User:Badawi|Karim Badawi]]
: Contact: [http://iis-projects.ee.ethz.ch/index.php/User:Badawi Karim Badawi]
 
===Prerequisites===
 
: Knowledge of the VLSI1 Lecture
 
: Interest in Mobile Communications
 
: Knowledge of Matlab (or willingness to learn)
 
: VHDL knowledge would be advantageous but not necessary
 
  
<!--
+
[[Category:Badawi]]
===Status: Completed ===
 
: Fall Semester 2014 (sem13h2)
 
: Matthias Baer, Renzo Andri
 
--->
 
<!--
 
===Status: In Progress ===
 
: Student A, StudentB
 
: Supervision: [http://iis-projects.ee.ethz.ch/index.php/User:Badawi Karim Badawi]
 
--->
 
===Character===
 
: 10% Theory
 
: 15% Matlab
 
: 60% VHDL / FPGA Implementation
 
: 15% Testing & Results
 
 
 
===Professor===
 
<!-- : [http://www.iis.ee.ethz.ch/portrait/staff/lbenini.en.html Luca Benini] --->
 
: [http://www.iis.ee.ethz.ch/portrait/staff/huang.en.html Qiuting Huang]
 
<!-- : [http://lne.ee.ethz.ch/en/general-information/people/professor.html Vanessa Wood] --->
 
<!-- : [http://www.iis.ee.ethz.ch/portrait/staff/mluisier.en.html Mathieu Luisier] --->
 
<!-- : [http://www.iis.ee.ethz.ch/portrait/staff/schenk.en.html Andreas Schenk] --->
 
<!-- : [http://www.dz.ee.ethz.ch/en/general-information/about/staff/uid/364.html Hubert Kaeslin] --->
 
 
 
==Detailed Task Description==
 
 
 
===Goals===
 
===Practical Details===
 
* '''[[Project Plan]]'''
 
* '''[[Project Meetings]]'''
 
* '''[[Design Review]]'''
 
* '''[[Coding Guidelines]]'''
 
* '''[[Final Report]]'''
 
* '''[[Final Presentation]]'''
 
 
 
==Results==
 
 
 
==Links==
 
 
 
[[#top|↑ top]]
 
[[Category:Hot]]
 
[[Category:Digital]]
 
[[Category:FPGA]]
 
[[Category:Telecommunications]]
 
[[Category:Master Thesis]]
 
[[Category:Semester Thesis]]
 
[[Category:Available]]
 
 
 
<!--
 
 
 
COPY PASTE FROM THE LIST BELOW TO ADD TO CATEGORIES
 
 
 
GROUP
 
[[Category:Digital]]
 
[[Category:Analog]]
 
[[Category:TCAD]]
 
[[Category:Nano Electronic]]
 
 
 
STATUS
 
[[Category:Available]]
 
[[Category:In progress]]
 
[[Category:Completed]]
 
[[Category:Research]]
 
 
 
TYPE OF WORK
 
[[Category:Semester Thesis]]
 
[[Category:Master Thesis]]
 
[[Category:PhD Thesis]]
 
 
 
NAMES OF EU/CTI/NT PROJECTS
 
[[Category:UltrasoundToGo]]
 
[[Category:IcySoC]]
 
[[Category:PSocrates]]
 
[[Category:UlpSoC]]
 
--->
 

Latest revision as of 10:15, 23 September 2016

Spartan-6-fpga.jpeg

Short Description

Current and future mobile communication networks rely on the cellular topology. The ability of a mobile user equipment (UE) such as a mobile phone to search for nearby cell towers and select the best available one to establish a connection is very crucial. At IIS, we have invented a new technique for the cell-search functionality in 3rd/4th generation mobile communication systems, which provides superior performance to known techniques. During the cell-search process, the mobile UE has to synchronize the local oscillator frequency relative to the carrier. Otherwise, the signal integrity is highly compromised and the overall performance is severely degraded.

To this end, the student will study and port the Matlab implementation of the algorithm to VHDL in order to implement the new technique on a powerful state-of-the-art FPGA board. After testing and verifying the hardware implementation, the VHDL code will be integrated with the rest of the already-implemented chip solution; thereby completing the whole baseband receiver chain.

Status: Obsolete

Contact: Karim Badawi