Personal tools

Difference between revisions of "Fault-Tolerant Floating-Point Units (M)"

From iis-projects

Jump to: navigation, search
(Created page with "<!-- Fault-Tolerant Floating-Point Units (M) --> Category:Digital Category:Acceleration_and_Transprecision Category:High Performance SoCs Category:Computer Arch...")
 
Line 23: Line 23:
  
  
−
Low-precision floating-point (FP) formats are getting more and more traction in the context of neural network (NN) training. Employing low-precision formats, such as 8-bit FP data types, reduce the model's memory footprint and open new opportunities to increase the system's energy efficiency.
+
Fault-tolerant features are crucial in critical and hostile environments (automotive, space, …). The goal of this project is to enhance the FP unit (FPU) developed at IIS [1] with fault-tolerant features (such as redundancy schemes [2]).
−
 
 
−
Hardware support for low-precision FP formats (down to 8 bits) is already available in the FP unit (FPU) developed at IIS [1], [2]. The goal of this project is to explore less-than-8b FP formats with a particular emphasis on shared-exponent MiniFloats [3].
 
  
 
== Character ==
 
== Character ==
Line 41: Line 39:
 
= References =
 
= References =
  
−
[1] https://arxiv.org/abs/2207.03192 MiniFloat-NN and ExSdotp: An ISA Extension and a Modular Open Hardware Unit for Low-Precision Training on RISC-V cores
+
[1] https://github.com/pulp-platform/cvfpu
−
 
 
−
[2] https://github.com/pulp-platform/cvfpu
 
  
−
[3] https://arxiv.org/abs/2310.10537
+
[2] https://arxiv.org/abs/2303.08706

Revision as of 19:25, 3 November 2023


Overview

Status: Available

Introduction

FPnew block diagram [1]. Each operation group block can be instantiated through a parameter. In the figure, the FPU was instantiated without a DivSqrt module.


Fault-tolerant features are crucial in critical and hostile environments (automotive, space, …). The goal of this project is to enhance the FP unit (FPU) developed at IIS [1] with fault-tolerant features (such as redundancy schemes [2]).

Character

  • 20% Literature / architecture review
  • 40% RTL implementation
  • 40% Evaluation

Prerequisites

  • Strong interest in computer architecture
  • Experience with digital design in SystemVerilog as taught in VLSI I
  • Experience with ASIC implementation flow (synthesis) as taught in VLSI II

References

[1] https://github.com/pulp-platform/cvfpu

[2] https://arxiv.org/abs/2303.08706

Retrieved from "http://iis-projects.ee.ethz.ch/index.php?title=Fault-Tolerant_Floating-Point_Units_(M)&oldid=9884"